Patents by Inventor Jun Nakata
Jun Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9666140Abstract: The invention provides a gate-in-panel display device capable of preventing deterioration of thin-film transistors during pause drive, as well as a method for driving the same. At the end of a drive period, an active clear signal is provided to thin-film transistors in unit circuits, each thin-film transistor being connected to either a first or second node at a gate terminal, thereby bringing the thin-film transistors into ON state. As a result, the voltages of the first and second nodes are set to a reference voltage. Thus, even if a pause period lasts for a long period of time, the gate terminals of the thin-film transistors are not subjected to sustained voltage application, leading to no threshold voltage shifts.Type: GrantFiled: December 6, 2013Date of Patent: May 30, 2017Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Masami Ozaki, Akihisa Iwamoto, Tomohiko Nishimura, Kohji Saitoh, Masaki Uehata
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Patent number: 9633617Abstract: According to a liquid crystal display device (1), a gate driver is controlled to (a) scan all of scan signal lines during at least two driving frames contained in a first driving period and (b) not scan any of the scan signal lines during pausing frames in a pausing period which is (i) secured between the first driving period and a second driving period by which the first driving period is followed and (ii) is longer than each of the first and second driving periods.Type: GrantFiled: July 2, 2012Date of Patent: April 25, 2017Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Akizumi Fujioka, Kohzoh Takahashi, Toshihiro Yanagi, Masami Ozaki
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Patent number: 9570030Abstract: A gate driver (24) which is provided by an IGZO-GDM and a level shifter circuit (13) are connected to each other via a first through a fifth wires (OL1 through OL5). Each wire (OL) is connected to a discharge unit (190). If an electric power supply to a first through a fifth output circuits (OC1 through OC5) in the level shifter circuit (13) becomes lower than a lower operation limit value during a power-off sequence which is supposed to remove a residual charge from inside a panel, outputs from the first through the fifth output circuits (OC1 through OC5) assume a high-impedance state, whereupon a potential on each wire (OL) is drawn by a discharge unit (190) into a ground potential. Therefore, residual charge inside the panel is removed quickly and stably when power supply is shut off.Type: GrantFiled: October 11, 2013Date of Patent: February 14, 2017Assignee: Sharp Kabushiki KaishaInventors: Akihisa Iwamoto, Masami Ozaki, Tomohiko Nishimura, Kohji Saitoh, Masaki Uehata, Jun Nakata
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Publication number: 20170011695Abstract: A display device performs display with a dot inversion driving method wherein, during a prescribed period of time between one driving period in which all of the scanning signal lines are scanned and a next driving period, an idle period that is longer in duration than each driving period is provided during which potentials of the plurality of data signal lines are kept constant, and during the idle period, the driving power control unit lowers a driving power of the signal line driver circuit, and wherein the signal line driver circuit outputs the data signals to the respective data signal lines during the driving period, and during the idle period, the signal line driver circuit sets an output thereof to the respective data signal lines to one of a high impedance state and a ground potential, such that the plurality of data signal lines have a constant potential.Type: ApplicationFiled: September 26, 2016Publication date: January 12, 2017Applicant: Sharp Kabushiki KaishaInventors: Jun NAKATA, Kohji SAITOH
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Patent number: 9530384Abstract: In a display device that can use a low frequency drive method, in the case of low frequency drive, in a data correction unit (23) of a display control circuit (200), a pixel grayscale value is set such that the differential value between the potential difference between the pixel electrode and the common electrode when a voltage of positive polarity is applied and the potential difference between the pixel electrode and the common electrode when a voltage of negative polarity is applied becomes larger than during normal drive. With this, a correction amount (shift amount) is made larger during low frequency drive than during normal drive, whereby flickers and ghosting during low frequency drive are prevented.Type: GrantFiled: November 8, 2013Date of Patent: December 27, 2016Assignee: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Akihisa Iwamoto, Tomohiko Nishimura, Masaki Uehata, Jun Nakata, Masami Ozaki
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Patent number: 9478186Abstract: When an idle period is started, a voltage of the control signal is changed from a value H to a value L. As a result, the analog amplifiers provided in the signal line driver circuit are switched from the normal state to the low-driving power state. At this time, the data signal lines are set to have a constant potential. A gate voltage is changed from Vgh to Vgl at the same time as when the control signal was changed from the value H to the value L. As a result, the gate of each TFT returns to the OFF state from the ON state. The control signal remains at the value L until the idle period is over. In other words, when the next driving period is started, the voltage of the control signal is changed from the value L to the value H. As a result, the analog amplifiers in the signal line driver circuit are switched back to the normal state from the low-driving power state.Type: GrantFiled: October 21, 2011Date of Patent: October 25, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Jun Nakata, Kohji Saitoh
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Patent number: 9437154Abstract: Provided for each data signal line drive circuit (6a, 6b, 6c) are: a voltage generation circuit (61a, 61b, 61c) that generates a drive voltage in accordance with an external voltage; and a voltage determination circuit (63a, 63b, 63c) which determines whether or not a voltage level of at least either the external voltage or the drive voltage falls within a range of allowable voltages, in a case where the voltage level does not fall within the range of allowable voltages, operation of the voltage generation circuits (61a, 61b, 61c) being stopped.Type: GrantFiled: April 5, 2012Date of Patent: September 6, 2016Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Masaki Uehata, Kohji Saitoh, Masami Ozaki, Toshihiro Yanagi
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Patent number: 9355606Abstract: A liquid crystal display device includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line reaching a first electric potential at a first timing after the change is initiated, and the common electrode being in an electrically floating state at a second timing which comes after the first timing.Type: GrantFiled: January 25, 2013Date of Patent: May 31, 2016Assignee: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Akihisa Iwamoto, Masami Ozaki, Masaki Uehata, Jun Nakata, Tomohiko Nishimura
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Patent number: 9311872Abstract: A display device (1) includes (i) refresh rate changing means (15) for changing a refresh rate of a display panel (2) and (ii) a polarity reversal controlling section (20) for changing, in accordance with a change in the refresh rate, at least one of a temporal cycle and a spatial cycle of a polarity reversal of a source signal.Type: GrantFiled: August 7, 2012Date of Patent: April 12, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Kohzoh Takahashi, Kohji Saitoh, Akizumi Fujioka, Jun Nakata, Toshihiro Yanagi
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Publication number: 20150332632Abstract: The invention provides a gate-in-panel display device capable of preventing deterioration of thin-film transistors during pause drive, as well as a method for driving the same. At the end of a drive period, an active clear signal is provided to thin-film transistors in unit circuits, each thin-film transistor being connected to either a first or second node at a gate terminal, thereby bringing the thin-film transistors into ON state. As a result, the voltages of the first and second nodes are set to a reference voltage. Thus, even if a pause period lasts for a long period of time, the gate terminals of the thin-film transistors are not subjected to sustained voltage application, leading to no threshold voltage shifts.Type: ApplicationFiled: December 6, 2013Publication date: November 19, 2015Inventors: Jun NAKATA, Masami OZAKI, Akihisa IWAMOTO, Tomohiko NISHIMURA, Kohji SAITOH, Masaki UEHATA
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Publication number: 20150332650Abstract: Provided are a display device capable of preventing burning by suppressing occurrence of a VCOM shift which occurs when a liquid crystal panel is driven for a long period of time, and a drive method thereof. Since a source output voltage corresponding to each of tone levels from a tone value 0 to a tone value 224 agrees with a flicker regulation voltage, a shift amount from the flicker regulation voltage is set to 0 mV, and a source output voltage corresponding to a tone value 255 is obtained by further adding +40 mV as a shift amount to 4.05 V which is the flicker regulation voltage. In such a manner, a source output voltage, increased at a high tone level and in the vicinity thereof, is applied to source bus lines SL1 to SLm and written into each liquid crystal capacitance Ccl.Type: ApplicationFiled: December 6, 2013Publication date: November 19, 2015Inventors: Kohji SAITOH, Akihisa IWAMOTO, Jun NAKATA, Masaki UEHATA, Tomohiko NISHIMURA, Ichiro UMEKAWA, Masami OZAKI
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Patent number: 9171517Abstract: A liquid crystal display device (1) according to one embodiment of the present invention includes a timing controller (4) which, (i) in a first display mode, in which a number of tones that each pixel is capable of displaying is smaller than a predetermined number, controls a scanning signal and a data signal by an interlace driving method, by which a single frame includes a plurality of fields, and (ii) in a second display mode, in which the number of tones that each pixel is capable of displaying is equal to or greater than the predetermined number, controls the scanning signal and the data signal by a progressive driving method.Type: GrantFiled: March 12, 2012Date of Patent: October 27, 2015Assignee: Sharp Kabushiki KaishaInventors: Yoshinori Shibata, Masami Ozaki, Kohji Saitoh, Masaki Uehata, Kazuki Takahashi, Jun Nakata
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Publication number: 20150279333Abstract: In a display device that can use a low frequency drive method, in the case of low frequency drive, in a data correction unit (23) of a display control circuit (200), a pixel grayscale value is set such that the differential value between the potential difference between the pixel electrode and the common electrode when a voltage of positive polarity is applied and the potential difference between the pixel electrode and the common electrode when a voltage of negative polarity is applied becomes larger than during normal drive. With this, a correction amount (shift amount) is made larger during low frequency drive than during normal drive, whereby flickers and ghosting during low frequency drive are prevented.Type: ApplicationFiled: November 8, 2013Publication date: October 1, 2015Inventors: Kohji Saitoh, Akihisa Iwamoto, Tomohiko Nishimura, Masaki Uehata, Jun Nakata, Masami Ozaki
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Patent number: 9147372Abstract: The purpose of the present invention is to provide a display device that has a simple configuration and small power consumption. A display device of the present invention has: source output amplifiers (36) fewer in number than a plurality of source signal lines (S); and a switching unit (32) that supplies data signals outputted from each of the source output amplifiers (36) to one of the source signal lines (S). Each of the source output amplifiers (36) outputs the data signals having different polarities to the source signal lines (S) adjacent to each other, and outputs the data signals by switching, by each frame period, the polarities of the data signals to be supplied to the source signal lines (S).Type: GrantFiled: March 26, 2012Date of Patent: September 29, 2015Assignee: SHARP KABUSHIKI KAISHAInventors: Jun Nakata, Masami Ozaki, Kohji Saitoh
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Publication number: 20150269900Abstract: A gate driver (24) which is provided by an IGZO-GDM and a level shifter circuit (13) are connected to each other via a first through a fifth wires (OL1 through OL5). Each wire (OL) is connected to a discharge unit (190). If an electric power supply to a first through a fifth output circuits (OC1 through OC5) in the level shifter circuit (13) becomes lower than a lower operation limit value during a power-off sequence which is supposed to remove a residual charge from inside a panel, outputs from the first through the fifth output circuits (OC1 through OC5) assume a high-impedance state, whereupon a potential on each wire (OL) is drawn by a discharge unit (190) into a ground potential. Therefore, residual charge inside the panel is removed quickly and stably when power supply is shut off.Type: ApplicationFiled: October 11, 2013Publication date: September 24, 2015Applicant: Sharp Kabushiki KaishaInventors: Akihisa Iwamoto, Masami Ozaki, Tomohiko Nishimura, Kohji Saitoh, Masaki Uehata, Jun Nakata
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Patent number: 9024854Abstract: A liquid crystal display device includes a gate driver, a source driver and a common driver. An input video signal is stored in a line memory and a gray scale with which an applied voltage becomes highest is detected from data corresponding to 1 line among the signal. A common electrode is driven by a common voltage being reduced in accordance with the gray scale and having a low effective value. The driver is driven by an output controlled in accordance with the voltage thus reduced. A voltage applied to a common electrode is set by using a LUT and a common voltage is set by using a LUT. It is therefore possible to provide a liquid crystal display device and a method of driving the liquid crystal display device, each of which can reduce power consumption.Type: GrantFiled: March 2, 2011Date of Patent: May 5, 2015Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Masaki Uehata
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Patent number: 8970645Abstract: A display device includes: a timing controller (10) for driving a scanning line driving circuit (4) and a signal line driving circuit (6) by providing a scanning period (T1) and a pause period (T2) which follows the scanning period (T1); a data analyzing section (101) for obtaining detection data on an external light intensity; and a BL luminance setting section (104) for outputting, at least during the pause period (T2), a BL control signal for adjusting, in accordance with the detection data obtained by the data analyzing section (101), a luminance of light to be emitted to a screen.Type: GrantFiled: July 10, 2014Date of Patent: March 3, 2015Assignee: Sharp Kabushiki KaishaInventors: Kohzoh Takahashi, Kohji Saitoh, Asahi Yamato, Taketoshi Nakano, Toshihiro Yanagi, Akizumi Fujioka, Jun Nakata
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Publication number: 20150042636Abstract: The present invention is intended to make it unlikely that, in a case where a transistor is turned on in preparation for an operation to turn off a power source of a liquid crystal display device, a DC voltage becomes applied across a pixel even if potential variation (kickback) occurs at a pixel electrode in reaction to a change in status of the transistor from an on state to an off state.Type: ApplicationFiled: January 28, 2013Publication date: February 12, 2015Inventors: Kohji Saitoh, Akihisa Iwamoto, Jun Nakata, Masaki Uehata, Tomohiko Nishimura, Masami Ozaki
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Publication number: 20150009195Abstract: A liquid crystal display device includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line reaching a first electric potential at a first timing after the change is initiated, and the common electrode being in an electrically floating state at a second timing which comes after the first timing.Type: ApplicationFiled: January 25, 2013Publication date: January 8, 2015Applicant: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Akihisa Iwamoto, Masami Ozaki, Masaki Uehata, Jun Nakata, Tomohiko Nishimura
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Patent number: 8878761Abstract: An object of the present invention is to provide a liquid crystal display device capable of improving a viewing angle, while not decreasing an aperture ratio and preventing an increase in electricity consumption. A liquid crystal display device (1) of the present invention includes an active matrix substrate including a plurality of drain electrodes (14) disposed in a matrix form, a counter substrate including a plurality of common electrodes, and a liquid crystal layer being sandwiched between the active matrix substrate and the counter substrate, each of the plurality of drain electrodes (14) having formed (i) a subpixel (16a) part facing a first common electrode (11) among the plurality of common electrodes, across the liquid crystal layer, and (ii) a subpixel (16b) part facing a second common electrode (12) among the plurality of common electrodes, across the liquid crystal layer.Type: GrantFiled: June 28, 2010Date of Patent: November 4, 2014Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Ken Inada