Patents by Inventor Jun Nara

Jun Nara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Silicon carbide (SiC) MOSFET with a silicon oxide layer capable of suppressing deterioration of carrier mobility and variation in threshold voltage
    Patent number: 10186596
    Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer, a gate electrode, and a silicon oxide layer disposed between the silicon carbide layer and the gate electrode, a number of single bonds between carbon atoms being larger than that of double bonds between carbon atoms in the silicon oxide layer.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: January 22, 2019
    Assignees: Kabushiki Kaisha Toshiba, National Institute for Materials Science
    Inventors: Tatsuo Shimizu, Takahisa Ohno, Tomoaki Kaneko, Takahiro Yamasaki, Nobuo Tajima, Jun Nara
  • SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR
    Publication number: 20170345657
    Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer, a gate electrode, and a silicon oxide layer disposed between the silicon carbide layer and the gate electrode, a number of single bonds between carbon atoms being larger than that of double bonds between carbon atoms in the silicon oxide layer.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 30, 2017
    Applicants: Kabushiki Kaisha Toshiba, National Institute for Materials Science
    Inventors: Tatsuo SHIMIZU, Takahisa OHNO, Tomoaki KANEKO, Takahiro YAMASAKI, Nobuo TAJIMA, Jun NARA
  • SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE
    Publication number: 20110233689
    Abstract: There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.
    Type: Application
    Filed: November 27, 2009
    Publication date: September 29, 2011
    Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, THE UNIVERSITY OF TOKYO, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Masahiko Hata, Noboru Fukuhara, Hisashi Yamada, Shinichi Takagi, Masakazu Sugiyama, Mitsuru Takenaka, Tetsuji Yasuda, Noriyuki Miyata, Taro Itatani, Hiroyuki Ishii, Akihiro Ohtake, Jun Nara