Patents by Inventor Jun Nogami
Jun Nogami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10283647Abstract: According to one embodiment, a semiconductor device includes an interconnection layer, a stacked body, a plurality of separation portions, a semiconductor body, a charge storage portion, an n-type semiconductor region, and a p-type semiconductor region. The n-type semiconductor region is provided between the separation portion and the first interconnection part, and has contact with the first interconnection part and the second semiconductor part. The p-type semiconductor region is provided between the separation portion and the second interconnection part, and has contact with the second interconnection part and the second semiconductor part.Type: GrantFiled: August 4, 2017Date of Patent: May 7, 2019Assignee: Toshiba Memory CorporationInventors: Koji Matsuo, Gaku Sudo, Jun Nogami, Tatsuro Shinozaki, Takashi Ishida, Jun Fujiki, Kenzo Manabe
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Patent number: 10090320Abstract: A semiconductor device according to an embodiment, includes a stacked body, a plurality of first terraces, a second terrace, a plurality of interconnects, a plurality of conductive bodies. The stacked body includes a plurality of electrode layers. The stacked body includes a stairstep portion at an end portion of the stacked body. The plurality of first terraces are provided in the stairstep portion. The second terrace is provided in the stairstep portion. The plurality of interconnects are provided from the second terrace to the plurality of first terraces. The plurality of interconnects contact one of the plurality of electrode layers at the stairstep portion. The plurality of conductive bodies are provided above the second terrace. The plurality of conductive bodies extend in a stacking direction of the stacked body. The conductive bodies contact the interconnects above the second terrace.Type: GrantFiled: September 16, 2016Date of Patent: October 2, 2018Assignee: Toshiba Memory CorporationInventors: Jun Nogami, Gaku Sudo
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Publication number: 20180040742Abstract: According to one embodiment, a semiconductor device includes an interconnection layer, a stacked body, a plurality of separation portions, a semiconductor body, a charge storage portion, an n-type semiconductor region, and a p-type semiconductor region. The n-type semiconductor region is provided between the separation portion and the first interconnection part, and has contact with the first interconnection part and the second semiconductor part. The p-type semiconductor region is provided between the separation portion and the second interconnection part, and has contact with the second interconnection part and the second semiconductor part.Type: ApplicationFiled: August 4, 2017Publication date: February 8, 2018Applicant: Toshiba Memory CorporationInventors: Koji Matsuo, Gaku Sudo, Jun Nogami, Tatsuro Shinozaki, Takashi Ishida, Jun Fujiki, Kenzo Manabe
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Publication number: 20170338240Abstract: A semiconductor device according to an embodiment, includes a stacked body, a plurality of first terraces, a second terrace, a plurality of interconnects, a plurality of conductive bodies. The stacked body includes a plurality of electrode layers. The stacked body includes a stairstep portion at an end portion of the stacked body. The plurality of first terraces are provided in the stairstep portion. The second terrace is provided in the stairstep portion. The plurality of interconnects are provided from the second terrace to the plurality of first terraces. The plurality of interconnects contact one of the plurality of electrode layers at the stairstep portion. The plurality of conductive bodies are provided above the second terrace. The plurality of conductive bodies extend in a stacking direction of the stacked body. The conductive bodies contact the interconnects above the second terrace.Type: ApplicationFiled: September 16, 2016Publication date: November 23, 2017Inventors: Jun NOGAMI, Gaku Sudo
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Patent number: 9583858Abstract: A connector terminal includes a conductive bar-shape member, a plurality of concavities each formed as a groove provided in an outer circumference of the bar-shape member, extending in a lengthwise direction of the bar-shape member, and spreading toward an opening from a bottom, and a convexity formed between the adjoining concavities. A first surface is formed on the bottom of the concavity. A second surface and a third surface that form different inclination angles relative to a depthwise direction of the concavity are alternately formed on an internal wall surface of the concavity from the bottom toward the opening.Type: GrantFiled: April 27, 2016Date of Patent: February 28, 2017Assignee: DAI-ICHI SEIKO CO., LTD.Inventors: Yoshimitsu Hashimoto, Jun Nogami, Hisashi Hamachi
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Publication number: 20160322732Abstract: A connector terminal includes a conductive bar-shape member, a plurality of concavities each formed as a groove provided in an outer circumference of the bar-shape member, extending in a lengthwise direction of the bar-shape member, and spreading toward an opening from a bottom, and a convexity formed between the adjoining concavities. A first surface is formed on the bottom of the concavity. A second surface and a third surface that form different inclination angles relative to a depthwise direction of the concavity are alternately formed on an internal wall surface of the concavity from the bottom toward the opening.Type: ApplicationFiled: April 27, 2016Publication date: November 3, 2016Inventors: Yoshimitsu Hashimoto, Jun Nogami, Hisashi Hamachi
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Patent number: 9378940Abstract: The present disclosure provides a substrate processing apparatus including: a substrate processing chamber configured to process a substrate on which a target layer to be removed is formed on the surface of an underlying layer; a substrate holding unit provided in the substrate processing chamber and configured to hold the substrate; a mixed liquid supplying unit configured to supply a mixed liquid of sulfuric acid and hydrogen peroxide to the substrate held by the substrate holding unit in a mixing ratio of the hydrogen peroxide and a temperature that does not damage the underlying layer while removing the target layer; and an OH-group supplying unit configured to supply a fluid containing OH-group to the substrate in an amount that does not damage the underlying layer when the mixed liquid and the OH-group are mixed on the substrate.Type: GrantFiled: June 13, 2013Date of Patent: June 28, 2016Assignee: Tokyo Electron LimitedInventors: Hisashi Kawano, Norihiro Ito, Yosuke Hachiya, Jun Nogami, Kotaro Ooishi, Itaru Kanno
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Publication number: 20160158886Abstract: The present disclosure relates to the field of laser induced modification and processing of materials. Modification is achieved by confining laser-material interaction within an array of narrow zones characterizing an optical interference profile. Disclosed is a method of laser induced modification of a material comprising applying at least one laser pulse to the material, the at least one laser pulse being incident on the first interface of the material, wherein the material is selected on the basis that it can support an optical interference pattern such that a thin volume at a site of at least one intensity maxima of the optical interference pattern is characterized by a laser intensity above a threshold value to responsively produce the laser induced modification of the material at a location relative to the first interface.Type: ApplicationFiled: July 22, 2014Publication date: June 9, 2016Inventors: Kitty KUMAR, Kenneth Kuei-Ching LEE, Jun NOGAMI, Peter R. HERMAN
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Publication number: 20140251539Abstract: Disclosed are a substrate processing apparatus and a substrate processing method configured to perform a processing of a substrate by a processing liquid, in which the processing liquid is supplied to a substrate which rotates to process the substrate. The substrate processing apparatus includes a substrate rotating unit that rotates the substrate, a processing liquid supply unit that supplies the processing liquid to the substrate, a collection cup disposed around the substrate to collect the processing liquid supplied to the substrate, and form an air stream that flows downward from an opening formed at a top of the collection cup through a periphery of an outside of the substrate, and a negative pressure generating unit which is provided at an inside of the collection cup and at an outside of the opening and generates a negative pressure which acts toward the outside of the substrate.Type: ApplicationFiled: March 6, 2014Publication date: September 11, 2014Applicant: Tokyo Electron LimitedInventors: Tsuyoshi Mizuno, Yoichi Tokunaga, Hiromitsu Namba, Tatuhiro Ueki, Jun Nogami, Jiro Higashijima, Yoshifumi Amano, Takatoshi Miyama
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Publication number: 20130340796Abstract: The present disclosure provides a substrate processing apparatus including: a substrate processing chamber configured to process a substrate on which a target layer to be removed is formed on the surface of an underlying layer; a substrate holding unit provided in the substrate processing chamber and configured to hold the substrate; a mixed liquid supplying unit configured to supply a mixed liquid of sulfuric acid and hydrogen peroxide to the substrate held by the substrate holding unit in a mixing ratio of the hydrogen peroxide and a temperature that does not damage the underlying layer while removing the target layer; and an OH-group supplying unit configured to supply a fluid containing OH-group to the substrate in an amount that does not damage the underlying layer when the mixed liquid and the OH-group are mixed on the substrate.Type: ApplicationFiled: June 13, 2013Publication date: December 26, 2013Inventors: Hisashi Kawano, Norihiro Ito, Yosuke Hachiya, Jun Nogami, Kotaro Ooishi, Itaru Kanno
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Publication number: 20130284213Abstract: The present disclosure provides a substrate processing method and a substrate processing apparatus. The substrate processing method includes: generating an SPM liquid of a first temperature that contains Caro's acid having a separation effect of a resist film formed on the surface of a substrate by mixing heated sulfuric acid with hydrogen peroxide; cooling the SPM liquid to a second temperature at which a reduction effect of film loss occurs; and applying the SPM liquid of the second temperature to the resist film thereby separating the resist film.Type: ApplicationFiled: April 8, 2013Publication date: October 31, 2013Applicant: Tokyo Electron LimitedInventors: Yosuke Hachiya, Norihiro Ito, Hisashi Kawano, Jun Nonaka, Jun Nogami