Abstract: The present disclosure relates to an electronic element module including a printed circuit board including a first insulating layer having a plurality of first openings, and a build-up structure disposed on one surface of the first insulating layer and having a first through-portion, wherein the plurality of first openings are disposed in the first through-portion on a plane; a conductive adhesive disposed in at least a portion of each of the plurality of first openings; and a first electronic element disposed in the first through-portion, and having a plurality of first electrode pads disposed. At least a portion of each of the plurality of first electrode pads is disposed in the plurality of first openings.

Abstract: A circuit board includes a core portion including a first cavity formed in one surface, and a second cavity formed in the other surface opposing the one surface and having a diameter different from a diameter of the first cavity; a first metal layer disposed on the one surface of the core portion; a second metal layer buried in the core portion; and a third metal layer disposed on the other surface of the core portion, wherein each of the first and second cavities of the core portion exposes at least a portion of the second metal layer.

Abstract: The present disclosure relates to an electronic element module including a printed circuit board including a first insulating layer having a plurality of first openings, and a build-up structure disposed on one surface of the first insulating layer and having a first through-portion, wherein the plurality of first openings are disposed in the first through-portion on a plane; a conductive adhesive disposed in at least a portion of each of the plurality of first openings; and a first electronic element disposed in the first through-portion, and having a plurality of first electrode pads disposed. At least a portion of each of the plurality of first electrode pads is disposed in the plurality of first openings.

Abstract: A printed circuit board includes a first rigid region and a flexible region, connected to the first rigid region and adjacent thereto in a first direction. The first rigid region has a thickness greater than a thickness of the flexible region, and the flexible region has a plurality of curved portions.

Abstract: A printed circuit board assembly includes a first printed circuit board, a second printed circuit board, and a space holding member. The second printed circuit board includes a first rigid substrate region, spaced apart from and opposed to the first printed circuit board, and a flexible substrate region, extended from one side of the first rigid substrate region to be connected to the first printed circuit board. The space holding member includes a first member, disposed between the first printed circuit board and the second printed circuit board to maintain a space therebetween, and a second member configured to fix the first printed circuit board or the second printed circuit board on the first member.

Abstract: A printed circuit board has a first base region and a flexible region. The printed circuit board includes a core layer including a first insulating layer including a high elastic material and a first wiring layer disposed on the first insulating layer; a first build-up layer disposed on the core layer in the first base region, and including a second insulating layer including a low elastic material, and having a first through portion penetrating through the second insulating layer; and a first electronic component disposed in the first through portion and connected to the first wiring layer.

Abstract: A printed circuit board includes a first rigid region and a flexible region, connected to the first rigid region and adjacent thereto in a first direction. The first rigid region has a thickness greater than a thickness of the flexible region, and the flexible region has a plurality of curved portions.

Abstract: A printed circuit board has a first base region and a flexible region. The printed circuit board includes a core layer including a first insulating layer including a high elastic material and a first wiring layer disposed on the first insulating layer; a first build-up layer disposed on the core layer in the first base region, and including a second insulating layer including a low elastic material, and having a first through portion penetrating through the second insulating layer; and a first electronic component disposed in the first through portion and connected to the first wiring layer.

Abstract: A fan-out semiconductor package may include a support member having a through-hole, a semiconductor chip disposed in the through-hole, a component embedded structure disposed adjacent to and spaced apart from the semiconductor chip in the through-hole by a predetermined distance, an encapsulant, and a connection member. The semiconductor chip has an active surface having connection pads disposed thereon and an inactive surface opposing the active surface. The component embedded structure has a plurality of passive components embedded therein. The encapsulant encapsulates at least portions of the support member, the component embedded structure, and the semiconductor chip. The connection member is disposed on the support member, the component embedded structure, and the active surface of the semiconductor chip. The connection member includes redistribution layers and vias electrically connecting the redistribution layers to the plurality of passive components and the connection pads of the semiconductor chip.

Abstract: A printed circuit board assembly includes a first printed circuit board, a second printed circuit board, and a space holding member. The second printed circuit board includes a first rigid substrate region, spaced apart from and opposed to the first printed circuit board, and a flexible substrate region, extended from one side of the first rigid substrate region to be connected to the first printed circuit board. The space holding member includes a first member, disposed between the first printed circuit board and the second printed circuit board to maintain a space therebetween, and a second member configured to fix the first printed circuit board or the second printed circuit board on the first member.

Abstract: There is provided a fan-out semiconductor device in which a first package having a semiconductor chip disposed therein and having a fan-out form and a second package having a passive component disposed therein and having a fan-out form are stacked in a vertical direction so that the semiconductor chip and the passive component are electrically connected to each other by a path as short as possible.

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

Abstract: A fan-out semiconductor package may include a support member having a through-hole, a semiconductor chip disposed in the through-hole, a component embedded structure disposed adjacent to and spaced apart from the semiconductor chip in the through-hole by a predetermined distance, an encapsulant, and a connection member. The semiconductor chip has an active surface having connection pads disposed thereon and an inactive surface opposing the active surface. The component embedded structure has a plurality of passive components embedded therein. The encapsulant encapsulates at least portions of the support member, the component embedded structure, and the semiconductor chip. The connection member is disposed on the support member, the component embedded structure, and the active surface of the semiconductor chip. The connection member includes redistribution layers and vias electrically connecting the redistribution layers to the plurality of passive components and the connection pads of the semiconductor chip.

Abstract: There is provided a fan-out semiconductor device in which a first package having a semiconductor chip disposed therein and having a fan-out form and a second package having a passive component disposed therein and having a fan-out form are stacked in a vertical direction so that the semiconductor chip and the passive component are electrically connected to each other by a path as short as possible.

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

Abstract: The present invention provides a printed circuit board includes an insulating member, a first plating layer buried in a bottom region of the insulating member, a second plating layer buried in a top region of the insulating member and a plating via for electrically connecting the first plating layer and the second plating layer by being buried in any one among the top region and the bottom region of the insulating member.

Abstract: A package structure and a method of manufacturing the package structure are disclosed. The package structure in accordance with an aspect of the present invention includes: a stiffener substrate; a dielectric layer and a circuit pattern layer laminated on the stiffener substrate; a protective layer laminated on the dielectric layer so as to protect the circuit pattern layer; a first electrode post protruded by penetrating the protective layer from the circuit pattern layer; and a chip receiving portion formed on a surface of the protective layer that is in a protruded direction of the first electrode post.

Abstract: A package substrate and a method for manufacturing the same are disclosed. The method for manufacturing a package substrate in accordance with an aspect of the present invention includes: forming a first open hole corresponding to a shape of a bonding pad in a first photo resist; laminating a second photo resist on the first photo resist and forming a second open hole corresponding to shapes of a soldering pad, a circuit pattern layer and the bonding pad in the second photo resist; and forming a pattern plating layer up to a predetermined height in the first open hole and the second open hole.