Patents by Inventor Jun Panayo

Jun Panayo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6741088
    Abstract: A semiconductor testing device having a nest for holding an integrated circuit during testing. The nest comprises a plate having a front side and a back side, a cavity in the plate for receiving an integrated circuit having a plurality of pins, a channel for receiving therein an anvil, and an anvil detachably engaged within the channel, positioned to engage the pins of the integrated circuit and to maintain the pins in alignment.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: May 25, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Monica B. Vizcara, Albert S. Hagad, Jun Panayo
  • Publication number: 20020109515
    Abstract: A semiconductor testing device having a nest for holding an integrated circuit during testing. The nest comprises a plate having a front side and a back side, a cavity in the plate for receiving an integrated circuit having a plurality of pins, a channel for receiving therein an anvil, and an anvil detachably engaged within the channel, positioned to engage the pins of the integrated circuit and to maintain the pins in alignment.
    Type: Application
    Filed: February 12, 2001
    Publication date: August 15, 2002
    Inventors: Monica B. Vizcara, Albert S. Hagad, Jun Panayo