Patents by Inventor Jun Sakano

Jun Sakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8436250
    Abstract: A circuit device of the present invention includes a wiring board 45, and circuit elements such as semiconductor elements 32 mounted on the wiring board 45. The wiring board 45 includes: a conductive pattern 12, which is a metal core layer; a first insulating layer 14 and a second insulating layer 16 respectively covering an upper surface and a lower surface of the conductive pattern 12; and a first wiring layer 18 and a second wiring layer 20 formed respectively on an upper surface of the first insulating layer 14 and a lower surface of the second insulating layer 16. The conductive pattern 12 is made of rolled metal. With this configuration, the thermal resistance of the conductive pattern 12, which is the metal core, is reduced, and the thermal dissipation of the entire device can be improved.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: May 7, 2013
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Kouji Takahashi, Yusuke Igarashi, Jun Sakano
  • Publication number: 20100012360
    Abstract: A circuit device of the present invention includes a wiring board 45, and circuit elements such as semiconductor elements 32 mounted on the wiring board 45. The wiring board 45 includes: a conductive pattern 12, which is a metal core layer; a first insulating layer 14 and a second insulating layer 16 respectively covering an upper surface and a lower surface of the conductive pattern 12; and a first wiring layer 18 and a second wiring layer 20 formed respectively on an upper surface of the first insulating layer 14 and a lower surface of the second insulating layer 16. The conductive pattern 12 is made of rolled metal. With this configuration, the thermal resistance of the conductive pattern 12, which is the metal core, is reduced, and the thermal dissipation of the entire device can be improved.
    Type: Application
    Filed: November 29, 2007
    Publication date: January 21, 2010
    Inventors: Kouji Takahashi, Yusuke Igarashi, Jun Sakano
  • Patent number: 7329957
    Abstract: A method of manufacturing a circuit device includes the steps of preparing a conductive foil, forming conductive patterns in convex shapes by forming an isolation trench on a surface of the conductive foil, covering the surface of the conductive foil with a resin film so as to form the resin film covering the isolation trench thicker than the resin film covering upper surfaces of the conductive patterns, exposing the upper surfaces of the conductive patterns out of the resin film by removing the resin film, electrically connecting the conductive pattern exposed out of the resin film to a circuit element, forming sealing resin to seal the circuit element, and removing a rear surface of the conductive foil until the conductive patterns are mutually isolated.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: February 12, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Jun Sakano, Kouji Takahashi, Yusuke Igarashi
  • Patent number: 6972477
    Abstract: To make thin a circuit device 10 in which are incorporated a plurality of types of circuit elements 12 that differ in thickness, first conductive patterns, onto which comparatively thin circuit elements 12A are mounted, are formed thickly, and second conductive patterns 11B, onto which comparatively thick second circuit elements 12B are mounted, are formed thinly. Also, fine wiring parts may be formed using the thinly formed second conductive patterns 12B. Thus even in the case where thick circuit elements are incorporated, by affixing such circuit elements onto the thinly formed second conductive patterns 11B, the total thickness can be made thin. Thinning of circuit device 10 as a whole can thus be accomplished.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: December 6, 2005
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Yusuke Igarashi, Nobuhisa Takakusaki, Jun Sakano, Noriaki Sakamoto
  • Publication number: 20050214981
    Abstract: A method of manufacturing a circuit device includes the steps of preparing a conductive foil, forming conductive patterns in convex shapes by forming an isolation trench on a surface of the conductive foil, covering the surface of the conductive foil with a resin film so as to form the resin film covering the isolation trench thicker than the resin film covering upper surfaces of the conductive patterns, exposing the upper surfaces of the conductive patterns out of the resin film by removing the resin film, electrically connecting the conductive pattern exposed out of the resin film to a circuit element, forming sealing resin to seal the circuit element, and removing a rear surface of the conductive foil until the conductive patterns are mutually isolated.
    Type: Application
    Filed: March 21, 2005
    Publication date: September 29, 2005
    Inventors: Jun Sakano, Kouji Takahashi, Yusuke Igarashi
  • Patent number: 6946724
    Abstract: A circuit device 10 comprises conductive patterns 11, separated by separation grooves 41, circuit elements 12, affixed onto conductive patterns 11, and an insulating resin 13, covering circuit elements 12 and conductive patterns 11 and filling separation grooves 41 while exposing the rear surfaces of conductive patterns 11. Constricted parts 19 are formed at side surfaces of separation grooves 41. At constricted parts 19, the width of separation grooves 41 is made narrower than at other locations. Thus by making insulating resin 13 adhere closely to constricted parts 19, the adhesion of insulating resin 13 with conductive patterns 11 is improved.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: September 20, 2005
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Yusuke Igarashi, Nobuhisa Takakusaki, Jun Sakano, Noriaki Sakamoto
  • Publication number: 20040169271
    Abstract: A circuit device 10 comprises conductive patterns 11, separated by separation grooves 41, circuit elements 12, affixed onto conductive patterns 11, and an insulating resin 13, covering circuit elements 12 and conductive patterns 11 and filling separation grooves 41 while exposing the rear surfaces of conductive patterns 11. Constricted parts 19 are formed at side surfaces of separation grooves 41. At constricted parts 19, the width of separation grooves 41 is made narrower than at other locations. Thus by making insulating resin 13 adhere closely to constricted parts 19, the adhesion of insulating resin 13 with conductive patterns 11 is improved.
    Type: Application
    Filed: December 11, 2003
    Publication date: September 2, 2004
    Inventors: Yusuke Igarashi, Nobuhisa Takakusaki, Jun Sakano, Noriaki Sakamoto
  • Publication number: 20040159913
    Abstract: To make thin a circuit device 10 in which are incorporated a plurality of types of circuit elements 12 that differ in thickness, first conductive patterns, onto which comparatively thin circuit elements 12A are mounted, are formed thickly, and second conductive patterns 11B, onto which comparatively thick second circuit elements 12B are mounted, are formed thinly. Also, fine wiring parts may be formed using the thinly formed second conductive patterns 12B. Thus even in the case where thick circuit elements are incorporated, by affixing such circuit elements onto the thinly formed second conductive patterns 11B, the total thickness can be made thin. Thinning of circuit device 10 as a whole can thus be accomplished.
    Type: Application
    Filed: December 11, 2003
    Publication date: August 19, 2004
    Inventors: Yusuke Igarashi, Nobuhisa Takakusaki, Jun Sakano, Noriaki Sakamoto