Patents by Inventor Jun Sano

Jun Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8281983
    Abstract: A method and apparatus for storing and verifying serial numbers using a smart label in an image production device is disclosed. The method for storing may include receiving a signal to query a smart label for serial number information, querying the smart label for serial number information, receiving the serial number information from the smart label, and storing the serial number information in a memory. The method for verifying may include receiving a signal to query a smart label for serial number information, querying the smart label for serial number information, receiving the serial number information from the smart label, determining if the serial number matches a serial number stored in the image production device, wherein if it is determined that the serial number matches the stored serial number performing requested image production device operations, otherwise sending an error signal.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: October 9, 2012
    Assignee: Xerox Corporation
    Inventors: David Scott Shuman, Jun Sano, Heiko Rommelmann
  • Publication number: 20110315758
    Abstract: A method and apparatus for storing and verifying serial numbers using a smart label in an image production device is disclosed. The method for storing may include receiving a signal to query a smart label for serial number information, querying the smart label for serial number information, receiving the serial number information from the smart label, and storing the serial number information in a memory. The method for verifying may include receiving a signal to query a smart label for serial number information, querying the smart label for serial number information, receiving the serial number information from the smart label, determining if the serial number matches a serial number stored in the image production device, wherein if it is determined that the serial number matches the stored serial number performing requested image production device operations, otherwise sending an error signal.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: XEROX CORPORATION
    Inventors: David Scott SHUMAN, Jun SANO, Heiko ROMMELMANN
  • Patent number: 4485318
    Abstract: An interface circuit for an integrated injection logic circuit comprises a current mirror circuit having its input current value set by a first resistor and its input controlled by an output signal of the integrated injection logic circuit, a second resistor connected to a current path at the output side of the current mirror circuit, and output means connected to the current output terminal of the current mirror circuit.
    Type: Grant
    Filed: March 10, 1982
    Date of Patent: November 27, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Jun Sano
  • Patent number: 4438353
    Abstract: An I.sup.2 L logic circuit provided with a logic section which includes at least one I.sup.2 L unit circuit formed of a transistor for injector and a driving transistor.The I.sup.2 L logic circuit is further provided with a supply circuit for supplying the I.sup.2 L unit circuit with an injector current corresponding to a control signal. The supply circuit is formed of a first circuit for steadily supplying the I.sup.2 L unit circuit with a predetermined injector current, and a second circuit for supplying the I.sup.2 L unit circuit with another injector current in accordance with the control signal, the first and second circuits being connected in parallel with each other.
    Type: Grant
    Filed: May 7, 1981
    Date of Patent: March 20, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Jun Sano, Masahide Aoyama, Daijiro Kubo
  • Patent number: 4069461
    Abstract: The input stage of an amplifier circuit formed from first and second semiconductor differential amplifiers comprising a pair of transistors having emitter electrodes connected to each other, respectively. The respective collector electrodes of one pair of transistors in each of the first and second semiconductor differential amplifiers is connected to the respective collector electrodes of the other pair of transistors, the base electrode of one transistor of each pair of transistors respectively being connected to an input terminal of the amplifier circuit and the base electrode of the other transistor of each pair of transistors respectively being connected to first and second negative feedback circuits connected to the output stage of the amplification circuit. First and second electrical switches are respectively connected to the common emitter electrodes of each pair of transistors. One of the first and second electrical switches is controlled to be closed selectively.
    Type: Grant
    Filed: March 14, 1977
    Date of Patent: January 17, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Jun Sano