Abstract: There is provided a cooperative driving control method based on a vehicle security status. The cooperative driving method according to an embodiment includes: identifying a security status of a cooperative driving target vehicle; determining a cooperative driving strategy according to the identified security status; and controlling driving according to the determined cooperative driving strategy. Accordingly, cooperative driving may be performed or excluded based on a security status of a target vehicle, so that an accident may be prevented from being caused by cooperative driving with a problematic vehicle, and safety of a driver and an occupant may be guaranteed.

Abstract: A device for preventing rotation of a vehicle seat rail is described. The device prevents an upper rail on the center side of a vehicle from rotating when a forward load is applied to a vehicle seat, thereby preventing a lock plate from being fractured due to rotation of the upper rail.

Abstract: Disclosed is a fin field-effect transistor having size-reduced source/drain regions so that a merging phenomenon of epitaxial structures between transistors in a layout is prevented, thus increasing the number of transistors per unit area, and so that an additional mask process is not required, thus maintain processing costs without change, and a method of manufacturing the same.

Abstract: Disclosed is a fin field-effect transistor having size-reduced source/drain regions so that a merging phenomenon of epitaxial structures between transistors in a layout is prevented, thus increasing the number of transistors per unit area, and so that an additional mask process is not required, thus maintain processing costs without change, and a method of manufacturing the same.

Abstract: Disclosed is a metal source/drain-based field effect transistor having a structure that replaces a portion of a semiconductor of a source/drain with a metal and a method of manufacturing the same. By replacing the source/drain region with the source/drain metal region, increase of the parasitic resistance of a conventional three-dimensional MOSFET of several tens of nanometers, lattice mismatch of the source/drain during selective epitaxial growth, and self-heating effect can be fundamentally solved. Further, since the metal is deposited after the partial etching of the source/drain region or the selective epitaxial growth is partially performed under the conventional CMOS process, the process can be performed without using any additional mask.

Abstract: A method for setting of a semiconductor manufacturing parameter according to an embodiment is a method performed in a computing device including one or more processors, and a memory for storing one or more programs executed by the one or more processors, the method including an operation of inputting manufacturing parameters for manufacturing a semiconductor to a neural network model and an operation of training the neural network model to predict at least one of power and delay of the semiconductor based on the input manufacturing parameters.

Abstract: Disclosed is a field effect transistor including an insulating film disposed between a source/drain region and a substrate. Since the insulating film prevents current leakage under a channel, it is not necessary to form a punch-through stopper. Further disclosed is a method of forming a field effect transistor.

Abstract: Disclosed in a CASCODE device in which multiple transistors are stacked in a vertical direction and connected in series. The CASCODE device exhibits improvements in device/circuit intrinsic gain (GmRo) that is a performance index for analog/RF applications, cutoff frequency (Ft), and maximum oscillation frequency (Fmax). A method of manufacturing the CASCODE device is also disclosed.

Abstract: Disclosed is a fin field-effect transistor having size-reduced source/drain regions so that a merging phenomenon of epitaxial structures between transistors in a layout is prevented, thus increasing the number of transistors per unit area, and so that an additional mask process is not required, thus maintain processing costs without change, and a method of manufacturing the same.

Abstract: Disclosed is a field effect transistor including an insulating film disposed between a source/drain region and a substrate. Since the insulating film prevents current leakage under a channel, it is not necessary to form a punch-through stopper. Further disclosed is a method of forming a field effect transistor.

Abstract: Disclosed is a metal source/drain-based field effect transistor having a structure that replaces a portion of a semiconductor of a source/drain with a metal and a method of manufacturing the same. By replacing the source/drain region with the source/drain metal region, increase of the parasitic resistance of a conventional three-dimensional MOSFET of several tens of nanometers, lattice mismatch of the source/drain during selective epitaxial growth, and self-heating effect can be fundamentally solved. Further, since the metal is deposited after the partial etching of the source/drain region or the selective epitaxial growth is partially performed under the conventional CMOS process, the process can be performed without using any additional mask.