Patents by Inventor Jun-Soo Han
Jun-Soo Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240430121Abstract: A real-time monitoring system for home appliances according to an embodiment of the present disclosure may receive product information and a Wi-Fi address generated in a manufacturing process from a production management server according to production of a product, receive customer information for a user of the home appliance sold from a customer response app server according to selling/purchase of the product, matching the product information and the customer information corresponding to the Wi-Fi address with each other, and group the home appliances by region according to the Wi-Fi address to output a monitoring screen including the information on the home appliance to a display device.Type: ApplicationFiled: November 25, 2022Publication date: December 26, 2024Applicant: LG ELECTRONICS INC.Inventors: Yong Hoan KWON, Seong In CHEONG, Jun Soo HAN, ILL SHIN KIM
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Patent number: 11274865Abstract: Disclosed are a refrigerator diagnostic method and a refrigerator using an artificial intelligence algorithm (AI) and/or machine learning algorithm in a 5G environment connected for the Internet of things. The refrigerator diagnostic method may include determining an installation state of a refrigerator based on a power value of a compressor provided in the refrigerator and the number of revolutions of a cooling fan provided in the refrigerator, when an operating time after initial installation of the refrigerator is less than or equal to a particular value, and determining a malfunction and a cleaning state of the refrigerator based on the power value of the compressor and the number of revolutions of the cooling fan, when the operating time after initial installation of the refrigerator exceeds the particular value.Type: GrantFiled: December 18, 2019Date of Patent: March 15, 2022Assignee: LG ELECTRONICS INC.Inventors: Jun Soo Han, Cho Lok Han, Young Hun Yang, Jun Seong Jeong
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Patent number: 10912180Abstract: The present disclosure relates to an X-ray source apparatus and a control method of the X-ray source apparatus in which a cathode electrode and a gate electrode are arranged in an array form to enable matrix control, and, thus, it is possible to irradiate X-rays at an optimum dose for each position on the subject. Therefore, it is possible to suppress the irradiation of more X-rays than are needed to the subject. Also, it is possible to obtain a high-resolution and high-quality X-ray image. As such, two-dimensional matrix control makes it easy to control the dose of X-rays and makes it possible to uniformly irradiate X-rays to the subject. Therefore, it is possible to manufacture a high-resolution surface X-ray source with less dependence on the size of the focus of electron beams.Type: GrantFiled: April 1, 2019Date of Patent: February 2, 2021Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Cheol Jin Lee, Sang Heon Lee, Jun Soo Han, Han Bin Go
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Publication number: 20200124329Abstract: Disclosed are a refrigerator diagnostic method and a refrigerator using an artificial intelligence algorithm (AI) and/or machine learning algorithm in a 5G environment connected for the Internet of things. The refrigerator diagnostic method may include determining an installation state of a refrigerator based on a power value of a compressor provided in the refrigerator and the number of revolutions of a cooling fan provided in the refrigerator, when an operating time after initial installation of the refrigerator is less than or equal to a particular value, and determining a malfunction and a cleaning state of the refrigerator based on the power value of the compressor and the number of revolutions of the cooling fan, when the operating time after initial installation of the refrigerator exceeds the particular value.Type: ApplicationFiled: December 18, 2019Publication date: April 23, 2020Applicant: LG ELECTRONICS INC.Inventors: Jun Soo Han, Cho Lok Han, Young Hun Yang, Jun Seong Jeong
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Patent number: 10566167Abstract: The present disclosure provides a method of manufacturing a carbon nanotube electron emitter, including: forming a carbon nanotube film; performing densification by dipping the carbon nanotube film in a solvent; cutting an area of the carbon nanotube film into a pointed shape or a line shape; and fixing the cutting area of the carbon nanotube film arranged between at least two metal members to face upwards with lateral pressure.Type: GrantFiled: September 21, 2018Date of Patent: February 18, 2020Assignee: Korea University Research and Business FoundationInventors: Cheol Jin Lee, Sang Heon Lee, Jun-Soo Han
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Patent number: 10529525Abstract: The present disclosure provides a method of manufacturing a carbon nanotube electron emitter, including: forming a carbon nanotube film; performing densification by dipping the carbon nanotube film in a solvent; cutting an area of the carbon nanotube film into a pointed shape or a line shape; and fixing the cutting area of the carbon nanotube film arranged between at least two metal members to face upwards with lateral pressure.Type: GrantFiled: June 26, 2019Date of Patent: January 7, 2020Assignee: Korea University Research and Business FoundationInventors: Cheol Jin Lee, Sang Heon Lee, Jun-Soo Han
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Publication number: 20190318895Abstract: The present disclosure provides a method of manufacturing a carbon nanotube electron emitter, including: forming a carbon nanotube film; performing densification by dipping the carbon nanotube film in a solvent; cutting an area of the carbon nanotube film into a pointed shape or a line shape; and fixing the cutting area of the carbon nanotube film arranged between at least two metal members to face upwards with lateral pressure.Type: ApplicationFiled: June 26, 2019Publication date: October 17, 2019Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Cheol Jin LEE, Sang Heon LEE, Jun-Soo HAN
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Publication number: 20190306963Abstract: The present disclosure relates to an X-ray source apparatus and a control method of the X-ray source apparatus in which a cathode electrode and a gate electrode are arranged in an array form to enable matrix control, and, thus, it is possible to irradiate X-rays at an optimum dose for each position on the subject. Therefore, it is possible to suppress the irradiation of more X-rays than are needed to the subject. Also, it is possible to obtain a high-resolution and high-quality X-ray image. As such, two-dimensional matrix control makes it easy to control the dose of X-rays and makes it possible to uniformly irradiate X-rays to the subject. Therefore, it is possible to manufacture a high-resolution surface X-ray source with less dependence on the size of the focus of electron beams.Type: ApplicationFiled: April 1, 2019Publication date: October 3, 2019Inventors: Cheol Jin LEE, Sang Heon LEE, Jun Soo HAN, Han Bin GO
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Publication number: 20190088437Abstract: The present disclosure provides a method of manufacturing a carbon nanotube electron emitter, including: forming a carbon nanotube film; performing densification by dipping the carbon nanotube film in a solvent; cutting an area of the carbon nanotube film into a pointed shape or a line shape; and fixing the cutting area of the carbon nanotube film arranged between at least two metal members to face upwards with lateral pressure.Type: ApplicationFiled: September 21, 2018Publication date: March 21, 2019Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Cheol Jin LEE, Sang Heon LEE, Jun-Soo HAN
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Publication number: 20120013007Abstract: A Package-on-Package (POP) semiconductor package has a structure in which a second semiconductor package is stacked on a first semiconductor package. A plurality of spacers are disposed between a first substrate of the first semiconductor package and a second substrate of the second semiconductor package so as to maintain a gap between the first substrate and the second substrate. The plurality of spacers may project from a bottom surface of the second substrate toward the first substrate, or may project from a top surface of the first substrate toward the second substrate. When an upper molding layer is formed on the second substrate so as to cover a second semiconductor chip, the plurality of spacers may be connected to the upper molding layer via through holes that vertically pass through the second substrate.Type: ApplicationFiled: June 16, 2011Publication date: January 19, 2012Inventors: Hyun-ik HWANG, Heui-seog KIM, Wha-su SIN, Jun-soo HAN
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Publication number: 20110124273Abstract: In a wafer polishing apparatus, the height of the wheel tip can be adjusted. The wafer polishing apparatus includes a wheel tip constructed and arranged to be in direct contact with a wafer; a spindle shaft configured to receive power to enable rotation of the wheel tip; a wheel shank positioned at a lower part of the spindle shaft and supporting the wheel tip, the wheel tip not being directly fixed thereto; and a moving shaft having a first side on which the wheel tip is mounted and an opposite side to which the spindle shaft is connected, and relatively movable with respect to the spindle shaft.Type: ApplicationFiled: May 27, 2010Publication date: May 26, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-Hyun Roh, Heui-Seog Kim, Wha-Su Sin, Jun-Soo Han
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Publication number: 20110024919Abstract: A wiring substrate for a semiconductor chip includes a substrate having a first face and a second face opposite to the first face. The substrate has a window from the first face to the second face that exposes chip pads of a semiconductor chip adherable to the first face. A first bonding pad is arranged on the second face along a side portion of the window. The first bonding pad is connected to a bonding wire drawn from the chip pad through the window at a predetermined angle with respect to the side portion. A second bonding pad is adjacent to the first bonding pad on the second face. The second bonding pad includes an end portion having an inclined side portion at an angle corresponding to the drawn angle of the first bonding wire for avoiding an overlap of the second bonding pad with the first bonding wire.Type: ApplicationFiled: July 22, 2010Publication date: February 3, 2011Inventors: Tae-Gyu Kang, Wha-Su Sin, Jun-Soo Han
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Patent number: 7405105Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: GrantFiled: September 28, 2007Date of Patent: July 29, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Publication number: 20080049402Abstract: A printed circuit board having supporting patterns is provided. The printed circuit board includes a base substrate having a circuit region and peripheral regions. The circuit region includes a plurality of unit cells arranged in a matrix, and the peripheral regions are located around the circuit region. Wires are located on the circuit region. First supporting bars are located on the peripheral regions and extend across the peripheral regions, and a plurality of supporting ribs traverse the first supporting bars.Type: ApplicationFiled: July 9, 2007Publication date: February 28, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-Soo HAN, Gil-Beag KIM, Yong-Jin JUNG
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Publication number: 20080026507Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: ApplicationFiled: September 28, 2007Publication date: January 31, 2008Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Patent number: 7291925Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: GrantFiled: May 20, 2005Date of Patent: November 6, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Patent number: 7288436Abstract: A method for manufacturing a semiconductor chip package may include screen printing an adhesive on a substrate using a screen printing mask. The adhesive may be heated during a first curing process. A semiconductor chip may be attached to the adhesive on the substrate. The adhesive may be heated during a second curing process. The physical property of the adhesive may be transformed before and after a screen printing process to improve the operational performance and/or quality of the adhesive.Type: GrantFiled: December 6, 2004Date of Patent: October 30, 2007Assignee: Samsung Electronics, Co., Ltd.Inventors: Sang-Young Kim, Gil-Beag Kim, Yong-Jin Jung, Jun-Soo Han, Hyun-Ik Hwang
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Publication number: 20060118831Abstract: A semiconductor package may include a substrate having a first major surface supporting a substrate pad and a bump pad electrically connected to the substrate pad. The substrate may have a second major surface with a concave part. A substrate window may extend through the substrate and open at the concave part. A semiconductor chip may be mounted on the substrate. The semiconductor chip may have a chip pad exposed through the substrate windows. Additionally, a method may involve forming a concave part in the substrate.Type: ApplicationFiled: November 8, 2005Publication date: June 8, 2006Inventors: Hyun-Ik Hwang, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Jun-Soo Han
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Publication number: 20060102996Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: ApplicationFiled: May 20, 2005Publication date: May 18, 2006Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Publication number: 20050287708Abstract: A method for manufacturing a semiconductor chip package may include screen printing an adhesive on a substrate using a screen printing mask. The adhesive may be heated during a first curing process. A semiconductor chip may be attached to the adhesive on the substrate. The adhesive may be heated during a second curing process. The physical property of the adhesive may be transformed before and after a screen printing process to improve the operational performance and/or quality of the adhesive.Type: ApplicationFiled: December 6, 2004Publication date: December 29, 2005Inventors: Sang-Young Kim, Gil-Beag Kim, Yong-Jin Jung, Jun-Soo Han