Abstract: A line memory has a source image area and a decoration image area allocated thereto. The source image area sequentially retains partial source image data corresponding to at least one line of a screenful of a source image. The decoration image area retains decoration image data corresponding to a decoration image for decoration of the source image. An image superimposing circuit repeatedly performs superimposing processing to superimpose the partial source image data retained in the line memory with partial decoration image data corresponding to the partial source image data, until a screenful of the source image is superimposed. Thus, the source image data and the decoration image data can be superimposed without use of a system bus. This can prevent increase in system bus utilization.