Patents by Inventor Jun Uehara

Jun Uehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095371
    Abstract: An information processing apparatus according to one embodiment, includes: a vulnerability database storing vulnerability information including a vulnerability identifier for uniquely specifying vulnerability, a software identifier for uniquely specifying software including the vulnerability, and vulnerability description indicating content of the vulnerability; a matching processor to specify, in the vulnerability database, vulnerability information matching a software identifier of a target software provided in target equipment; a causal component specifier to specify, from the vulnerability description in the vulnerability information specified by the matching processor, a causal component that is a cause of the vulnerability; a type determiner to determine a type of the causal component from a name of the specified causal component; and an output processor to determine, based on the software identifier of the target software and the type of the causal component, an investigation procedure concerning vulne
    Type: Application
    Filed: February 28, 2023
    Publication date: March 21, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuya UEHARA, Jun KANAI, Ryuiti KOIKE
  • Publication number: 20240070290
    Abstract: An information processing apparatus according to one embodiment, comprising: a first vulnerability information obtainer configured to obtain, from a first server, first vulnerability information; a second vulnerability information obtainer configured to obtain, from a second server, second vulnerability information; a first configuration information obtainer configured to obtain first configuration information included in the target device; a scanner configured to detect a first identifier, from the first vulnerability information, based on the first configuration information, and identify the vulnerability identifier associated with the detected first identifier; a searcher configured to identify a second identifier that is associated with the vulnerability identifier identified, and includes a name of software identical to the name of the target software, based on the second vulnerability information; and an output processor configured to generate a third identifier by replacing the version included in the
    Type: Application
    Filed: February 27, 2023
    Publication date: February 29, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Ryuiti KOIKE, Tatsuya UEHARA, Hayeong SHIN, Jun KANAI
  • Patent number: 11791770
    Abstract: A circuit device includes a first terminal, a first oscillation circuit oscillating a resonator and generating a first voltage for automatic gain control for controlling amplitude of a signal output from the resonator, a digital signal generation circuit generating a digital signal corresponding to the first voltage, and a first interface circuit outputting the digital signal to the first terminal.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: October 17, 2023
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Teppei Higuchi, Jun Uehara, Yuichi Toriumi, Hiroshi Kiya
  • Publication number: 20230318608
    Abstract: A circuit device includes: a first phase comparison circuit including a sampling circuit that samples a feedback signal based on a reference clock signal; a first charge pump circuit configured to output a current corresponding to a sampling voltage; a second phase comparison circuit including a dead zone detection circuit that detects whether a phase difference between the reference clock signal and a feedback clock signal falls within a dead zone, and configured to output a phase difference signal when the phase difference does not fall within the dead zone; a second charge pump circuit; and a clock signal generation circuit configured to generate the clock signal having a frequency controlled based on an output of the first charge pump circuit or the second charge pump circuit. The second charge pump circuit is set disabled or in a low power consumption mode in a dead zone period.
    Type: Application
    Filed: March 29, 2023
    Publication date: October 5, 2023
    Inventors: Jun UEHARA, Akio TSUTSUMI, Hideki SATO
  • Patent number: 11665640
    Abstract: A microcomputer performs a power supply operation to a wireless communication module at a first time interval set based on a power generation amount at a lowest day power generation amount of a temperature differential power generation module. In addition, the microcomputer performs the power supply operation to a sensor at a second time interval set based on the power generation amount at the lowest day power generation amount of the temperature differential power generation module.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: May 30, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shiro Kamohara, Akira Tanabe, Kazuya Uejima, Jun Uehara, Kazuya Okuyama
  • Publication number: 20230020823
    Abstract: A circuit device includes a first terminal, a first oscillation circuit oscillating a resonator and generating a first voltage for automatic gain control for controlling amplitude of a signal output from the resonator, a digital signal generation circuit generating a digital signal corresponding to the first voltage, and a first interface circuit outputting the digital signal to the first terminal.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 19, 2023
    Inventors: Teppei Higuchi, Jun Uehara, Yuichi Toriumi, Hiroshi Kiya
  • Publication number: 20220264450
    Abstract: A microcomputer performs a power supply operation to a wireless communication module at a first time interval set based on a power generation amount at a lowest day power generation amount of a temperature differential power generation module. In addition, the microcomputer performs the power supply operation to a sensor at a second time interval set based on the power generation amount at the lowest day power generation amount of the temperature differential power generation module.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 18, 2022
    Inventors: Shiro KAMOHARA, Akira TANABE, Kazuya UEJIMA, Jun UEHARA, Kazuya OKUYAMA
  • Patent number: 11018645
    Abstract: Provided is an oscillator including: a resonator; a first circuit device electrically coupled to the resonator; and a second circuit device. The first circuit device generates a first clock signal by causing the resonator to oscillate, and performs first temperature compensation processing for temperature compensating a frequency of the first clock signal. The second circuit device receives the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs second temperature compensation processing for temperature compensating a frequency of the second clock signal.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: May 25, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Jun Uehara
  • Patent number: 10812019
    Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, a control terminal that is electrically coupled to the circuit device, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit and sets a potential of the control terminal to an abnormality detection voltage when an abnormal state is detected by the abnormality detection circuit.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 20, 2020
    Assignee: Seiko Epson Corporation
    Inventor: Jun Uehara
  • Patent number: 10802076
    Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit, and when an abnormal state is detected by the abnormality detection circuit, the circuit device changes a signal characteristic of the clock signal.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 13, 2020
    Assignee: Seiko Epson Corporation
    Inventor: Jun Uehara
  • Publication number: 20200274512
    Abstract: Provided is an oscillator including: a resonator; a first circuit device electrically coupled to the resonator; and a second circuit device. The first circuit device generates a first clock signal by causing the resonator to oscillate, and performs first temperature compensation processing for temperature compensating a frequency of the first clock signal. The second circuit device receives the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs second temperature compensation processing for temperature compensating a frequency of the second clock signal.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 27, 2020
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Jun UEHARA
  • Publication number: 20200018794
    Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit, and when an abnormal state is detected by the abnormality detection circuit, the circuit device changes a signal characteristic of the clock signal.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 16, 2020
    Inventor: Jun UEHARA
  • Publication number: 20200021243
    Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, a control terminal that is electrically coupled to the circuit device, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit and sets a potential of the control terminal to an abnormality detection voltage when an abnormal state is detected by the abnormality detection circuit.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 16, 2020
    Inventor: Jun UEHARA
  • Patent number: 10408619
    Abstract: A composite sensor includes a first sensor outputting a first sensor signal, a second sensor outputting a second sensor signal, a circuit board electrically connected to the first and second sensors, and a mount member having one surface on which the first and second sensors and the circuit board are disposed. The first and second sensors have respective input terminals to which respective input signals are inputted, and have respective output terminals from which the first and second sensor signals are outputted. When a virtual straight line passing respective centers of the first and second sensors parallel to an arrangement direction of the sensors is defined, the respective input terminals of the first and second sensors are disposed in one of two regions divided by the virtual line, and the respective output terminals of the first and second sensors are disposed in a remaining one of the two regions.
    Type: Grant
    Filed: December 25, 2015
    Date of Patent: September 10, 2019
    Assignees: DENSO CORPORATION, SEIKO EPSON CORPORATION
    Inventors: Naoki Yoshida, Takashi Aoyama, Jun Uehara
  • Publication number: 20180003501
    Abstract: A composite sensor includes a first sensor outputting a first sensor signal, a second sensor outputting a second sensor signal, a circuit board electrically connected to the first and second sensors, and a mount member having one surface on which the first and second sensors and the circuit board are disposed. The first and second sensors have respective input terminals to which respective input signals are inputted, and have respective output terminals from which the first and second sensor signals are outputted. When a virtual straight line passing respective centers of the first and second sensors parallel to an arrangement direction of the sensors is defined, the respective input terminals of the first and second sensors are disposed in one of two regions divided by the virtual line, and the respective output terminals of the first and second sensors are disposed in a remaining one of the two regions.
    Type: Application
    Filed: December 25, 2015
    Publication date: January 4, 2018
    Applicants: DENSO CORPORATION, SEIKO EPSON CORPORATION
    Inventors: Naoki YOSHIDA, Takashi AOYAMA, Jun UEHARA
  • Publication number: 20170276694
    Abstract: A circuit device includes first and second detection circuits which detect physical quantity signals based on detection signals from first and second physical quantity transducers, a multiplexer which selects any one signal among a plurality of signals including the physical quantity signals from the first and second detection circuits, an A/D conversion circuit which performs A/D conversion of the selected signal, and a logic circuit which performs processing of a digital signal from the A/D conversion circuit. The first detection circuit is arranged on a second direction side from a first side of the circuit device. The second detection circuit is arranged on the second direction side from the first side and on a first direction side from the first detection circuit. The A/D conversion circuit is arranged between at least one of the first or second detection circuit and the logic circuit.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 28, 2017
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Jun UEHARA
  • Publication number: 20170027830
    Abstract: An object of the invention is to provide a hair dye composition containing an oxidation dye or a direct dye which has excellent emulsion stability. In order to achieve the object, a hair dye composition containing a surfactant having a sterol skeleton is provided. As a result, a hair dye composition containing an oxidation dye or a direct dye having excellent emulsion stability can be obtained.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 2, 2017
    Inventors: Jun UEHARA, Miyuki ENDO, Hiroyuki SUGAYA
  • Publication number: 20160269011
    Abstract: A circuit device includes a multiplexer that selects an input signal from first to n-th input signals in a time division manner and outputs the selected input signal to an output node, an A/D conversion circuit that receives the first to n-th input signals outputted from the multiplexer to the output node in a time division manner and A/D-converts the received first to n-th input signals in a time division manner, and a buffer circuit provided between an i-th input node and the output node of the multiplexer. The buffer circuit buffers the i-th input signal and outputs the buffered signal to the output node of the multiplexer in a first period. The multiplexer selects the i-th input signal and outputs the selected signal to the output node in a second period. End timing of the second period comes after end timing of the first period.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 15, 2016
    Inventors: Jun UEHARA, Takashi AOYAMA
  • Patent number: 8085263
    Abstract: A power supply circuit which outputs a common electrode voltage to a common electrode of an electro-optical device provided opposite to pixel electrodes through an electro-optical material includes a voltage booster circuit which generates a boost voltage boosted by a charge-pump operation in synchronization with a charge clock signal, and a common electrode voltage generation circuit which outputs a high-potential-side voltage or a low-potential-side voltage generated based on the boost voltage to the common electrode as the common electrode voltage. The charge clock signal has a rising edge and a falling edge in a period in which a sign of voltages between the pixel electrode and the common electrode are either positive or negative.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: December 27, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Jun Uehara
  • Publication number: 20080084410
    Abstract: A power supply circuit which outputs a common electrode voltage to a common electrode of an electro-optical device provided opposite to pixel electrodes through an electro-optical material includes a voltage booster circuit which generates a boost voltage boosted by a charge-pump operation in synchronization with a charge clock signal, and a common electrode voltage generation circuit which outputs a high-potential-side voltage or a low-potential-side voltage generated based on the boost voltage to the common electrode as the common electrode voltage. The charge clock signal has a rising edge and a falling edge in a period in which a sign of voltages between the pixel electrode and the common electrode are either positive or negative.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 10, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Jun Uehara