Patents by Inventor Jun Wu

Jun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230261993
    Abstract: A network device inputs first network status information of the network device in a first time period to an ECN inference model, to obtain an inference result that is output by the ECN inference model based on the first network status information. Then, the network device sends an ECN parameter sample to an analysis device that manages the network device, where the ECN parameter sample includes the first network status information and a target ECN configuration parameter corresponding to the first network status information, and the target ECN configuration parameter is obtained based on the inference result. The network device receives an updated ECN inference model sent by the analysis device.
    Type: Application
    Filed: April 24, 2023
    Publication date: August 17, 2023
    Inventors: Haonan Ye, Liang Zhang, Jian Cheng, Jun Wu
  • Publication number: 20230262985
    Abstract: The present disclosure relates to an integrated chip including a three-dimensional memory array. The three-dimensional memory array includes a first local line and a second local line that are elongated vertically, a first memory cell extending between the first local line and the second local line, and a second memory cell directly under the first memory cell, extending between the first local line and the second local line, and coupled in parallel with the first memory cell. The first memory cell is coupled to a first word line and the second memory cell is coupled to a second word line. The first word line and the second word line are elongated horizontally. A first global line is disposed at a first height and is elongated horizontally. A first selector extends vertically from the first local line to the first global line.
    Type: Application
    Filed: April 27, 2023
    Publication date: August 17, 2023
    Inventors: Chen-Jun Wu, Yu-Wei Jiang, Sheng-Chih Lai
  • Patent number: 11729701
    Abstract: A distribution network system and method. The distribution system has a plurality of communication channels and is connected to a mesh network. The mesh network uses one of the plurality of communication channels as a distributable network channel. The distribution network system includes an already-distributed network node and a to-be-distributed network node. The already-distributed network node is located in the mesh network and is configured to broadcast a mesh network beacon to the distributable network channel. The to-be-distributed node is configured to alternately monitor whether the mesh network beacon is detected on each communication channel.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: August 15, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Jing-Jun Wu, Cui Ding, Zhao-Ming Li, Zuo-Hui Peng, Guo-Feng Zhang
  • Publication number: 20230254180
    Abstract: The present invention relates to a full-electronic turnout security control system for a train-to-train communication and a method thereof. The system comprises: a communication module for realizing an external communication respectively with a resource manager and a maintenance system and an internal communication respectively with a turnout control module, a relay driving module and a relay collection module; the turnout control module for controlling rotation of a turnout and collecting a turnout representation; the relay driving module for driving a relay to turn on or off according to a turnout power source on or off command transmitted by the resource manager; the relay collection module for collecting an on or off state of the collection relay and respectively transmitting the state to the resource manager and the maintenance system through the communication module; and a relay for connecting the relay driving module, the relay collection module and a switch machine driving return line.
    Type: Application
    Filed: September 23, 2021
    Publication date: August 10, 2023
    Inventors: Chun YANG, Jianhua JIANG, Weijuan LI, Qingbiao XU, Cheng ZHANG, Chao LI, Zhenhua HU, Jun WU
  • Publication number: 20230255124
    Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes forming a reactivity reducing coating over one or more lower interconnect layers disposed over a substrate. A bottom electrode layer is formed on and in contact with the reactivity reducing coating. The bottom electrode layer has a first electronegativity that is less than or equal to a second electronegativity of the reactivity reducing coating. A data storage element is formed over the bottom electrode layer and a top electrode layer is formed over the data storage element. The top electrode layer, the data storage element, the reactivity reducing coating, and the bottom electrode layer are patterned to define a memory device.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Inventors: Chao-Yang Chen, Chun-Yang Tsai, Kuo-Ching Huang, Wen-Ting Chu, Pili Huang, Cheng-Jun Wu
  • Patent number: 11723210
    Abstract: In some embodiments, the present disclosure relates to a method for forming a memory device, including forming a plurality of word line stacks respectively including a plurality of word lines alternatingly stacked with a plurality of insulating layers over a semiconductor substrate, forming a data storage layer along opposing sidewalls of the word line stacks, forming a channel layer along opposing sidewalls of the data storage layer, forming an inner insulating layer between inner sidewalls of the channel layer and including a first dielectric material, performing an isolation cut process including a first etching process through the inner insulating layer and the channel layer to form an isolation opening, forming an isolation structure filling the isolation opening and including a second dielectric material, performing a second etching process through the inner insulating layer on opposing sides of the isolation structure to form source/drain openings, and forming source/drain contacts in the source/drain
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsu Ching Yang, Feng-Cheng Yang, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, Hung-Chang Sun, Chen-Jun Wu, Chung-Te Lin
  • Patent number: 11723199
    Abstract: A memory device includes a stack of gate electrode layers and interconnect layers arranged over a substrate. A first memory cell that is arranged over the substrate includes a first source/drain conductive lines and a second source/drain conductive line extending vertically through the stack of gate electrode layers. A channel layer and a memory layer are arranged on outer sidewalls of the first and second source/drain conductive lines. A first barrier structure is arranged between the first and second source/drain conductive lines. A first protective liner layer separates the first barrier structure from each of the first and second source/drain conductive lines. A second barrier structure is arranged on an opposite side of the first source/drain conductive line and is spaced apart from the first source/drain conductive line by a second protective liner layer.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsu Ching Yang, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, Hung-Chang Sun, Chen-Jun Wu, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11706233
    Abstract: Embodiments are directed to monitoring network traffic using network monitoring computers (NMCs). NMCs may determine requests provided to a server based on a first portion of network traffic. NMCs may determine suspicious requests based on characteristics of the provided requests. NMCs may employ the characteristics of the suspicious requests to provide correlation information that is associated with the suspicious requests. NMCs may determine dependent actions associated with the server based on a second portion of the network traffic and the correlation information. And, in response to determining anomalous activity associated with the evaluation of the dependent actions, NMCs may provide reports associated with the anomalous activity.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: July 18, 2023
    Assignee: ExtraHop Networks, Inc.
    Inventors: Benjamin Thomas Higgins, Jesse Abraham Rothstein, Xue Jun Wu, Michael Kerber Krause Montague, Kevin Michael Seguin
  • Patent number: 11696521
    Abstract: Various embodiments of the present disclosure are directed towards a memory cell comprising a high electron affinity dielectric layer at a bottom electrode. The high electron affinity dielectric layer is one of multiple different dielectric layers vertically stacked between the bottom electrode and a top electrode overlying the bottom electrode. Further, the high electrode electron affinity dielectric layer has a highest electron affinity amongst the multiple different dielectric layers and is closest to the bottom electrode. The different dielectric layers are different in terms of material systems and/or material compositions. It has been appreciated that by arranging the high electron affinity dielectric layer closest to the bottom electrode, the likelihood of the memory cell becoming stuck during cycling is reduced at least when the memory cell is RRAM. Hence, the likelihood of a hard reset/failure bit is reduced.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: July 4, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Yang Chen, Chun-Yang Tsai, Kuo-Ching Huang, Wen-Ting Chu, Cheng-Jun Wu
  • Publication number: 20230204929
    Abstract: A camera lens is installed in an unmanned aerial vehicle. The camera lens includes, from an object side to an image side, a first lens group, a second lens group, a diaphragm, and a third lens group. The first lens group includes a first lens having a negative refractive power and a second lens having a positive refractive power. The second lens group includes a third lens having a positive refractive power, a fourth lens having a positive refractive power, a fifth lens having a positive or negative refractive power, a sixth lens having a negative refractive power, and a seventh lens having a negative refractive power. The third lens group including an eighth lens having a positive refractive power and a ninth lens having a positive or negative refractive power. The camera lens needs only nine lenses to achieve high-quality imaging for the unmanned aerial vehicle.
    Type: Application
    Filed: March 3, 2023
    Publication date: June 29, 2023
    Inventor: Jun WU
  • Publication number: 20230197847
    Abstract: The present disclosure relates to a method for forming a ferroelectric memory device. The method includes forming a dielectric layer over a semiconductor substrate and forming a first conductive layer over the dielectric layer. The first conductive layer has a first overall electronegativity. A ferroelectric layer is formed on the first conductive layer. The ferroelectric layer has a second overall electronegativity less than or equal to the first overall electronegativity. A second conductive layer is formed on the ferroelectric layer. The second conductive layer has a third overall electronegativity greater than or equal to the second overall electronegativity. The second conductive layer, the ferroelectric layer, and the first conductive layer are etched to form a polarization switching structure. An ILD layer is formed over the polarization switching structure, and a planarization process is performed on the ILD layer. A first conductive via is formed over the polarization switching structure.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 22, 2023
    Inventors: Mickey Hsieh, Chun-Yang Tsai, Kuo-Ching Huang, Kuo-Chi Tu, Pili Huang, Cheng-Jun Wu, Chao-Yang Chen
  • Patent number: 11683278
    Abstract: In a data processing method that based on an instant messaging application and which is performed by a data processing device, audio data from an instant messaging application is obtained, and sampled volume data corresponding to the audio data is obtained based on a sampling frequency. A spectrogram corresponding to the audio data is generated according to the audio data and the sampled volume data, and a message bar comprising the spectrogram and the audio data is outputted. Audio progress control is then performed on the audio data in response to a target trigger operation on the message bar, and display control is performed on the spectrogram based on an audio progress.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: June 20, 2023
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Liqiang Liu, Sha Sha, Jun Wu, Qinghua Zhong
  • Publication number: 20230181027
    Abstract: This document relates to methods and materials for treating a neuromyelitis optica (NMO) spectrum disorder such as NMO. For example, one or more tetracycline antibiotics can be administered to a mammal having, or at risk of developing, a NMO spectrum disorder to treat the mammal.
    Type: Application
    Filed: May 27, 2020
    Publication date: June 15, 2023
    Inventors: Long-Jun Wu, Tingjun Chen, Vanda A. Lennon
  • Patent number: 11674158
    Abstract: Disclosed herein are homology-independent targeted integration methods of integrating an exogenous DNA sequence into a genome of a non-dividing cell and compositions for such methods. Methods herein comprise contacting the non-dividing cell with a composition comprising a targeting construct comprising the exogenous DNA sequence and a targeting sequence, a complementary strand oligonucleotide homologous to the targeting sequence, and a nuclease, thereby altering the genome of the non-dividing cell.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: June 13, 2023
    Assignee: Salk Institute for Biological Studies
    Inventors: Juan Carlos Izpisua Belmonte, Keiichiro Suzuki, Reyna Hernandez-Benitez, Jun Wu, Yuji Tsunekawa
  • Patent number: 11671368
    Abstract: A network device inputs first network status information of the network device in a first time period to an ECN inference model, to obtain an inference result that is output by the ECN inference model based on the first network status information. Then, the network device sends an ECN parameter sample to an analysis device that manages the network device, where the ECN parameter sample includes the first network status information and a target ECN configuration parameter corresponding to the first network status information, and the target ECN configuration parameter is obtained based on the inference result. The network device receives an updated ECN inference model sent by the analysis device.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: June 6, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Haonan Ye, Liang Zhang, Jian Cheng, Jun Wu
  • Patent number: 11672123
    Abstract: The present disclosure relates to an integrated chip including a three-dimensional memory array. The three-dimensional memory array includes a first local line and a second local line that are elongated vertically, a first memory cell extending between the first local line and the second local line, and a second memory cell directly under the first memory cell, extending between the first local line and the second local line, and coupled in parallel with the first memory cell. The first memory cell is coupled to a first word line and the second memory cell is coupled to a second word line. The first word line and the second word line are elongated horizontally. A first global line is disposed at a first height and is elongated horizontally. A first selector extends vertically from the first local line to the first global line.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Jun Wu, Yu-Wei Jiang, Sheng-Chih Lai
  • Patent number: 11663191
    Abstract: Techniques perform log management. Such techniques involve obtaining a count value of a counter associated with a log entry in the log, the count value of the counter incrementing at a predetermined frequency. Such techniques further involve determining a rough time instant when the log entry is created based on the count value, a reference count value of the counter associated with the log entry, a reference time corresponding to the reference count value and the frequency. Such techniques further involve correcting the rough time instant based at least in part on the frequency and a set of count values of the counter corresponding to a set of time instants, to determine a corrected time when the log entry is created. Accordingly, the log backed up to the external storage device has accurate time information.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: May 30, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Naifeng Li, Jiajie Sun, Jun Wu, Zihao Jiang, Minggang Lu
  • Patent number: 11652714
    Abstract: Embodiments are directed to monitoring network traffic using network monitoring computers (NMCs). Two or more network segments coupled by a traffic forwarding device (TFD) may be monitored. External network addresses and internal network addresses may be determined based on encrypted network traffic exchanged between external endpoints and the TFD and internal network traffic exchanged between internal endpoints and the TFD. Metrics associated with the external network addresses or the internal network addresses may be determined based on the monitoring. Correlation scores may be provided for the external network addresses and the internal network addresses based on of a correlation model, the metrics, or the other metrics. If a correlation score associated with an external network address and an internal network address exceeds a threshold value, the external network address and the internal network address may be associated with each other based on the correlation score.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: May 16, 2023
    Assignee: ExtraHop Networks, Inc.
    Inventors: Xue Jun Wu, Arindum Mukerji, Jeff James Costlow, Michael Kerber Krause Montague, Jesse Abraham Rothstein, Matthew Alexander Schurr
  • Patent number: D988197
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: June 6, 2023
    Inventors: Jiangnan Cao, Feng Fan, Jun Wu
  • Patent number: D988198
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: June 6, 2023
    Inventors: Jiangnan Cao, Feng Fan, Jun Wu