Patents by Inventor Jun Yabuzaki

Jun Yabuzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110109281
    Abstract: A multiplier multiplies a current signal of an Iy generator and a voltage signal from a Vx generator corresponding to a divided voltage value of an output voltage of a full-wave rectifier. The result of the multiplication is output as a current reference signal to the non-inversion input terminal of a current error amplifier. A current peak waveform generator circuit generates an envelope waveform of peak values of an inductor current. An Iz generator, when the envelope waveform exceeds a first threshold value smaller than a third threshold value set in an overcurrent protection circuit, curbs the inductor current by adjusting the size of a current signal output to the multiplier, and reducing the current reference signal.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 12, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO. LTD.
    Inventors: Jun YABUZAKI, Jian CHEN
  • Patent number: 7629668
    Abstract: The electrode of a thin-type capacitor is connected to the rear surface of a p-type semiconductor substrate which is brought to a ground potential, by a conductive DAF (Die Attach Film) or by a conductive adhesive, and the electrodes of the front surface of the p-type semiconductor substrate are respectively connected with and stacked on the terminals of a thin-type inductor by bumps, whereby manufacturing costs can be reduced while the occurrence of noise can be suppressed and packaging area can be made small.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: December 8, 2009
    Assignee: Fuji Electric Technology Co., Ltd.
    Inventors: Jun Yabuzaki, Takeshi Yokoyama, Tomonori Seki
  • Patent number: 7564228
    Abstract: In a switching regulator, an inductor L1 (in FIG. 1) and an output capacitor C1 are connected on the output side of a series circuit consisting of a switching element (MOS transistor P1) and a synchronous rectification element (MOS transistor N1), and an N-channel MOS transistor Q1 is connected between an intermediate point of the inductor L1 and one terminal thereof. In addition, the frequency of oscillator 2 and the turning ON/OFF of MOS transistor Q1 are controlled by control unit 1. When output voltage Vout is to be altered, the switching frequency of MOS transistors P1 and N1 is increased, and the inductance of inductor L1 is reduced, whereby a fast output change is permitted. On the other hand, during ordinary constant output voltage operation, the switching frequency is reduced, and the inductance value is increased, whereby high efficiency is attained.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: July 21, 2009
    Assignee: Fuji Electronic Device Technology Co., Ltd.
    Inventor: Jun Yabuzaki
  • Publication number: 20080237790
    Abstract: The electrode of a thin-type capacitor is connected to the rear surface of a p-type semiconductor substrate which is brought to a ground potential, by a conductive DAF (Die Attach Film) or by a conductive adhesive, and the electrodes of the front surface of the p-type semiconductor substrate are respectively connected with and stacked on the terminals of a thin-type inductor by bumps, whereby manufacturing costs can be reduced while the occurrence of noise can be suppressed and packaging area can be made small.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: Fuji Electric Device Technology Co., Ltd
    Inventors: Jun Yabuzaki, Takeshi Yokoyama, Tomonori Seki
  • Publication number: 20080067988
    Abstract: In a switching regulator, an inductor L1 (in FIG. 1) and an output capacitor C1 are connected on the output side of a series circuit consisting of a switching element (MOS transistor P1) and a synchronous rectification element (MOS transistor N1), and an N-channel MOS transistor Q1 is connected between an intermediate point of the inductor L1 and one terminal thereof. In addition, the frequency of oscillator 2 and the turning ON/OFF of MOS transistor Q1 are controlled by control unit 1. When output voltage Vout is to be altered, the switching frequency of MOS transistors P1 and N1 is increased, and the inductance of inductor L1 is reduced, whereby a fast output change is permitted. On the other hand, during ordinary constant output voltage operation, the switching frequency is reduced, and the inductance value is increased, whereby high efficiency is attained.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 20, 2008
    Applicant: Fuji Electric Device Technology Co., Ltd
    Inventor: Jun Yabuzaki
  • Patent number: 6340870
    Abstract: A lighting circuit for a discharge lamp incorporates a DC-DC converter for converting DC voltage and a control circuit for controlling the output voltage from the converter by controlling the ON/OFF operation of an FET which is configured as the converter. The electric current which flows in the FET is monitored by detecting the voltage between the drain and the source to turn the field effect transistor off when the voltage level is at the reference value or higher. Thus, a pulse-by-pulse current limitation is performed. Limitation of an electric current in a switching device in a DC-DC converter of a lighting circuit for a discharge lamp is achieved while reducing the size and cost of the circuit apparatus.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: January 22, 2002
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Yamashita, Jun Yabuzaki
  • Patent number: 6208089
    Abstract: A discharge-lamp lighting circuit has a switching power source portion (a DC—DC converter) for converting DC voltage and a control circuit for controlling output voltage of the converter by ON/OFF-controlling a switching device constituting the converter. The length of the ON-period of the switching device is changed with respect to a predetermined length of the OFF period to control the ratio of the two periods. In this manner, stable lighting of a discharge lamp and improved lighting efficiency are realized by the light circuit because a change in input/output conditions (change in the power source or a state of a load) of the lighting circuit of the discharge lamp cannot easily exert an influence.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: March 27, 2001
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Ito, Jun Yabuzaki, Atsushi Toda
  • Patent number: 6087776
    Abstract: A discharge lamp lighting circuit which, in turning on a discharge lamp, when an abnormal condition occurs in a discharge lamp or in the present discharge lamp lighting circuit due to a transient cause, can resume the power supply to the discharge lamp at the time when the present transient abnormal condition cause disappears. The discharge lamp lighting circuit includes lighting control for controlling the lighting of a discharge lamp, an abnormal condition detector for detecting an abnormal condition occurring in the discharge lamp or in the discharge lamp lighting circuit, and a protection circuit which receives a signal from the abnormal condition detector to thereby stop the power supply to the discharge lamp. The protection circuit is composed of first protection unit and second protection unit.
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: July 11, 2000
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Yamashita, Atsushi Toda, Jun Yabuzaki
  • Patent number: 6002215
    Abstract: A lighting circuit for a discharge lamp which reliably detects short-circuiting of, or current leakage from, a discharge. A lighting circuit 1 has DC-AC conversion means 3 for converting a DC voltage from the DC power supply 2 to an AC voltage and supplying the AC voltage to the discharge lamp 9. The lighting circuit further comprises sampling means 4 for sampling a lamp voltage or a lamp current of the discharge lamp 9 in synchronism with a drive signal Sp sent to the DC-AC conversion means 3 to generate an AC wave, and abnormality determining means 5 for determining short-circuiting of, or current leakage from, the discharge lamp 9 based on a detection signal from the sampling means 4. When an abnormality is detected, power supply to the discharge lamp 9 is stopped.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: December 14, 1999
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Yamashita, Atsushi Toda, Jun Yabuzaki
  • Patent number: 5973457
    Abstract: A lighting circuit for a discharge lamp is designed in such a way that a detection time for the flicker state of a discharge lamp is not affected by the light-OFF time at the time the discharge lamp flickers without causing a significant increase in cost.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: October 26, 1999
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Yamashita, Atsushi Toda, Jun Yabuzaki
  • Patent number: 5914566
    Abstract: A lighting circuit for a discharge lamp has input terminals to which a DC power supply is to be connected, a DC power supply circuit for converting a DC input voltage to a predetermined voltage, and a DC-AC converter for converting the output voltage of the DC power supply circuit to an AC voltage and then supplying the AC voltage to the discharge lamp. A transformer is incorporated in the DC power supply circuit as insulator means for insulating the circuit portion at its input stage from the circuit portion at its output stage. The transformer has its high-voltage output terminal connected to a ground-side one of the input terminals to supply a negative rectangular-wave voltage to the discharge lamp.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: June 22, 1999
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Akihiro Matsumoto, Masayasu Yamashita, Jun Yabuzaki