Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then run-length counted with a virtual channel clock so as to extract data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.

Abstract: An image forming apparatus includes toner image forming devices for forming toner images of a plurality of mutually different colors, a toner image carrying member for carrying thereon the toner images of the plurality of colors to be transferred onto a recording medium at one time, an adhesion amount detection device for detecting a toner adhesion amount of each of the toner images, and a failure determination device for determining the presence or absence of a sign of failure in the toner image forming devices. The failure determination device determines the presence or absence of the sign of failure in one of the toner image forming devices on the basis of information based on adhesion amount detection results obtained through detection by the adhesion amount detection device of toner adhesion amounts of toner images formed on the toner image carrying member by the other toner image forming devices.

Abstract: An image forming apparatus includes an acquiring unit that acquires a plurality of types of operation control information of the image forming apparatus; an index value calculating unit that calculates an index value indicating a state of the image forming apparatus based on the acquired operation control information; an abnormality judging unit that judges whether the image forming apparatus abnormality has occurred and predicts an occurrence of a failure based on the index value; and a detection pattern position detecting unit that detects a position of a detection pattern on an image carrier carrying a toner image. The detection pattern is formed on the image carrier carrying the toner image. The detection pattern position detecting unit detects the position of the detection pattern formed on the image carrier. The index value calculating unit uses information based on position detection data as the operation control information of the image forming apparatus.

Abstract: An image forming apparatus includes a failure prediction unit, an image identification unit, a simulated-image generating unit, and an output unit. The failure prediction unit prepares an index value indicating a condition of the image forming apparatus based on multidimensional signal, obtained by monitoring the image forming apparatus, and compares the index value with a first threshold value to predict a failure mode of the image forming apparatus. The image identification unit identifies types of abnormal images based on the failure mode predicted by the failure prediction unit. An identified abnormal image is predicted to be appear a given time later. The simulated-image generating unit generates a simulated image of the identified abnormal image. The output unit outputs the identified abnormal image as the simulated image.

Abstract: A phase-locked-loop device includes a clock generator for generating a reference clock based on a binarized playback signal and a frequency of run-length data and for generating N-phase clocks using the reference clock, a pulse-length measuring device for measuring a pulse length of the binarized playback signal using the N-phase clocks to output pulse-length data, and a run-length-data extracting device for counting the pulse-length data based on a virtual channel clock to extract run-length data. Pulse-length data is generated using the N-phase clocks (e.g., 16-phase clocks). The pulse-length data is counted based on the virtual channel clock to extract run-length data. Thus, it is not needed to generate a high-frequency clock, and the operating frequency is maintained sufficiently low.

Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.

Abstract: An image forming apparatus effectively reduces its maintenance cost and prevents a failure of the image forming apparatus in a period of busy use by the user, which includes a failure prediction distinction device configured to predict a failure based on an internal state signal, a maintenance time determination device configured to determine a time when maintenance is needed based on the internal state signal, and a maintenance need distinction device configured to distinguish whether or not maintenance is needed based on a result from the failure prediction distinction device at the maintenance time determined by the maintenance time determination device.

Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.

Abstract: A digital speed controlling apparatus includes: a target speed calculator that calculates a target speed of a driven conveyor belt, based on a sampling time; a current speed calculator that calculates a current speed of the conveyor belt, based on displacement and a difference of a sampling time; a target speed determining unit that determines whether a target speed is smaller than a predetermined value; a speed corrector that replaces the current speed with a set value, when the target speed is smaller than the predetermined value and also when the current speed is the minimum unit displacement per the sampling cycle; a speed error calculator that calculates an error between a replaced set value and the target speed; and an automatic controller that controls the drive motor based on a speed error.

Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.

Abstract: A digital speed controlling apparatus includes: a target speed calculator that calculates a target speed of a driven conveyor belt, based on a sampling time; a current speed calculator that calculates a current speed of the conveyor belt, based on displacement and a difference of a sampling time; a target speed determining unit that determines whether a target speed is smaller than a predetermined value; a speed corrector that replaces the current speed with a set value, when the target speed is smaller than the predetermined value and also when the current speed is the minimum unit displacement per the sampling cycle; a speed error calculator that calculates an error between a replaced set value and the target speed; and an automatic controller that controls the drive motor based on a speed error.

Abstract: A positioning controlling apparatus includes: a current speed calculator that calculates a current speed of a conveyor belt from a detected moving distance; a position determining unit that determines the position of a conveyor belt for determining its stop position also from the detected moving distance; a gain switch having a plurality of gains; a target speed calculator that inputs a gain obtained by switching, and calculates a target speed of the conveyor belt; a speed error calculator that calculates an error between a calculated target speed and a calculated current speed; and an automatic controller that controls a drive motor by using a speed error. When the position determining unit determines that the conveyor belt is in the positioning area, the gain switch performs positioning while switching plural gains and outputting it.

Abstract: When incorporating a print server (20) in a wireless LAN (1), an attached communication environment setting program is installed in a client terminal (10) and executed. Thereby, an advertisement packet is generated and broadcasted in the wireless LAN (1). In the print server (20), a program preinstalled therein continues attempt of changing channels and modes one by one until the advertisement packet is correctly received, and sets the channel and the communication mode used for the reception as the setting items of the communication environment. Thus, only by installing and executing the communication environment setting program in the client terminal (10), the communication mode and the channel can be set with ease.

Abstract: When incorporating a print server (20) in a LAN (1), an attached communication environment setting program is installed in a client terminal (10) and executed. Thereby, an address-search packet is generated and broadcasted within the LAN (1). In the server (20), a previously stored program generates a response packet containing the own IP address, and broadcasts the response packet. In the client terminal (10), upon receiving the response packet, communication environment is set up based on the IP address contained in the response packet. Thus, only by installing the communication environment setting program in the client terminal (10) and executing the same, the communication environment between the client terminal (10) and the print server (20) can be readily and automatically set up.

Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.

Abstract: A phase-locked-loop device includes a clock generator for generating a reference clock based on a binarized playback signal and a frequency of run-length data and for generating N-phase clocks using the reference clock, a pulse-length measuring device for measuring a pulse length of the binarized playback signal using the N-phase clocks to output pulse-length data, and a run-length-data extracting device for counting the pulse-length data based on a virtual channel clock to extract run-length data. Pulse-length data is generated using the N-phase clocks (e.g., 16-phase clocks). The pulse-length data is counted based on the virtual channel clock to extract run-length data. Thus, it is not needed to generate a high-frequency clock, and the operating frequency is maintained sufficiently low.

Abstract: When a device has a plurality of functions and setting items, a particular function and a particular setting item are selected from among a plurality of those functions and setting items. A menu having a tree structure is used in this selection by specifying a position in the tree structure so as to set the function and the setting item. The tree structure of the menu classifies the functions and the setting items.

Abstract: A digital speech waveform is divided into frames and sub-frames. Spectrum envelope information, pitch elements and stochastic elements are extracted and coded for the frames and sub-frames. A second error signal is calculated as a result of subtracting, from the sub-frames, pitch component speech generated from the pitch elements and spectrum envelope elements. The second error signal is coded so as to obtain the stochastic elements as a result of transforming the second error signal into a signal of a frequency domain through discrete cosine transformation and coding coefficients of the transformed domain.