Patents by Inventor Jun-Yao Wang

Jun-Yao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8321768
    Abstract: In a method and system for calculating CRC, a Partial CRC is first calculated directly according to a segment of a message. Then, a First Code including the Partial CRC appended with a plurality of zero-bytes is generated. Finally, the Adjusted CRC is calculated according to the First Code. Therefore, an Adjusted CRC can be derived directly from each segment of a message. After all segments of a message are received, all the derived Adjusted CRCs are merged to obtain a Final CRC of the message. The method and system can be quickly prototyped and implemented to various systems due to its simplicity.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: November 27, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Shen-Ming Chung, Jun-Yao Wang, Hsiao-Hui Lee
  • Patent number: 8103840
    Abstract: A snapshot mechanism and a method thereof used in a data processing system are provided to backup snapshot data. The snapshot mechanism includes a snapshot storage unit and a buffer storage unit, wherein the snapshot storage unit is used as a unit for storing data generated after a target storage unit snapshots data and accordingly generating a plurality of snapshot management data. In addition, the buffer storage unit temporarily stores new data and flushes the data to the target storage unit in predetermined time interval. According to the snapshot management data, the target storage unit can be rolled back or rolled forward to the status before a predetermined time.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: January 24, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Shyang Hwang, Ching-Hung Lin, Jun-Yao Wang, Chin-Pei Su, Tsung-Lin Tsai
  • Patent number: 7882315
    Abstract: A snapshot mechanism of a data processing system is provided herein. The snapshot mechanism includes providing a snapshot storage unit for storing the data created when snapshotting the target storage units and generating a plurality of snapshot images accordingly. Two different types of address tables in the snapshot image are used for corresponding to the storage units of the snapshot storage unit and the target storage units. The status of the target storage units can be recovered to the status at a predetermined time ago according to the snapshot images. The two types of address tables are respectively used for storing the data created by the data processing system and history data so as to prevent the data stored in the target storage units to be overwritten.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: February 1, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Tsung-Lin Tsai, Jun-Yao Wang, Shou-Jen Wey
  • Patent number: 7747766
    Abstract: A method and system for recognizing offloaded packets, wherein a common attribute of connection identifications among a plurality of offloaded connections is first calculated. Then, a connection identification of a packet is recognized to determine whether the connection identification of the packet has the common attribute so as to determine whether the packet is a non-offloaded packet. Therefore, the non-offloaded packet can be promptly recognized to greatly lower the recognition workload of an embedded processor, to improve the efficiency of executing a partial offloaded process by the embedded processor and to decrease the operation delay of the non-offloaded packet in a protocol offload processing system.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: June 29, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Shen-Ming Chung, Jun-Yao Wang, Hsiao-Hui Lee
  • Patent number: 7460550
    Abstract: A storage structure and method having multiple protocol processor units are disclosed. The storage structure comprises a host CPU, a main memory, a storage device, a switch fabric, and a host bus adapter module. The host bus adapter module includes a plurality of protocol processor nodes for processing frames received from a network, and storing those frames into the storage device. A processing module of the host bus adapter module extracts the session information of each frame and compares it with entries recorded in a look-up table. If the connection information hits one entry of the look-up table, the frame can be bypassed into a corresponding protocol processor node according to the definition of the look-up table. Otherwise, a new entry will be inserted into the look-up table for designating a corresponding protocol processor node.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: December 2, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Jun-Yao Wang, Chung-Ho Chen, Chao-Lin Su, Chao-Hsien Hsu, Cheng-Yeh Yu, I-Cheng Chung
  • Patent number: 7444451
    Abstract: The present invention relates to an adaptive interrupts coalescing system with recognizing minimum delay packets. The adaptive interrupts coalescing system of the invention comprises a first calculating device, a packet header parser, a second calculating device, and an interrupt controller. The first calculating device is used for calculating packet information of a plurality of packets. The packet header parser is used for recognizing the type of service field in each packet and for generating a minimum delay control signal. The second calculating device is used for determining a coalescing interrupt number signal according to the packet information and the minimum delay control signal. The interrupt controller is used for transmitting an interrupt control signal to process the packet according to the coalescing interrupt number signal.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: October 28, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Fong Wang, Jun-Yao Wang
  • Publication number: 20080250297
    Abstract: The invention relates to a method and system for calculating CRC. Firstly, a Partial CRC is calculated directly according to a segment of a message. Then, a First Code comprising the Partial CRC appended with a plurality of zero-bytes is generated. Finally, the Adjusted CRC is calculated according to the First Code. Therefore, the method and system of the invention can derive an Adjusted CRC directly from each segment of a message. After all segments of a message are received, all the derived Adjusted CRCs are merged to obtain a Final CRC of the message. The method and system of the invention can be quickly prototyped and implemented to various systems due to its simplicity.
    Type: Application
    Filed: April 3, 2008
    Publication date: October 9, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shen-Ming CHUNG, Jun-Yao WANG, Hsiao-Hui LEE
  • Publication number: 20070283041
    Abstract: The present invention relates to a method and system for recognizing offloaded packets. Firstly, according to the method of the present invention, a common attribute of connection identifications among a plurality of offloaded connections is calculated. Then, a connection identification of a packet is recognized to determine whether the connection identification of the packet has the common attribute so as to determine whether the packet is a non-offloaded packet. Therefore, the method of the present invention can promptly recognize the non-offloaded packet to greatly lower the recognition workload of an embedded processor, to improve the efficiency of executing a partial offloaded process by the embedded processor and to decrease the operation delay of the non-offloaded packet in a protocol offload processing system.
    Type: Application
    Filed: December 27, 2006
    Publication date: December 6, 2007
    Inventors: Shen-Ming Chung, Jun-Yao Wang, Hsiao-Hui Lee
  • Publication number: 20070271431
    Abstract: A snapshot mechanism and a method thereof used in a data processing system are provided to backup snapshot data. The snapshot mechanism includes a snapshot storage unit and a buffer storage unit, wherein the snapshot storage unit is used as a unit for storing data generated after a target storage unit snapshots data and accordingly generating a plurality of snapshot management data. In addition, the buffer storage unit temporarily stores new data and flushes the data to the target storage unit in predetermined time interval. According to the snapshot management data, the target storage unit can be rolled back or rolled forward to the status before a predetermined time.
    Type: Application
    Filed: December 6, 2006
    Publication date: November 22, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Shyang Hwang, Ching-Hung Lin, Jun-Yao Wang, Chin-Pei Su, Tsung-Lin Tsai
  • Publication number: 20070156985
    Abstract: A snapshot mechanism of a data processing system is provided herein. The snapshot mechanism includes providing a snapshot storage unit for storing the data created when snapshotting the target storage units and generating a plurality of snapshot images accordingly. Two different types of address tables in the snapshot image are used for corresponding to the storage units of the snapshot storage unit and the target storage units. The status of the target storage units can be recovered to the status at a predetermined time ago according to the snapshot images. The two types of address tables are respectively used for storing the data created by the data processing system and history data so as to prevent the data stored in the target storage units to be overwritten.
    Type: Application
    Filed: August 10, 2006
    Publication date: July 5, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tsung-Lin Tsai, Jun-Yao Wang, Shou-Jen Wey
  • Publication number: 20070143513
    Abstract: The present invention relates to an adaptive interrupts coalescing system with recognizing minimum delay packets. The adaptive interrupts coalescing system of the invention comprises a first calculating device, a packet header parser, a second calculating device, and an interrupt controller. The first calculating device is used for calculating packet information of a plurality of packets. The packet header parser is used for recognizing the type of service field in each packet and for generating a minimum delay control signal. The second calculating device is used for determining a coalescing interrupt number signal according to the packet information and the minimum delay control signal. The interrupt controller is used for transmitting an interrupt control signal to process the packet according to the coalescing interrupt number signal.
    Type: Application
    Filed: July 18, 2006
    Publication date: June 21, 2007
    Inventors: Wen-Fong Wang, Jun-Yao Wang
  • Patent number: 7174374
    Abstract: The present invention discloses a multi-priority media access control method for a multi-channel slotted ring network. In the slotted ring networks, each node has one tunable transmitter and one fixed receiver for data channels, and is able to inspect slot status on all channels. The header slot format defines the slot priorities on ring networks and limits which packets can be transmitted through the slots. By assigning slot priority based on two thresholds to raise and lower slot priority, multiple priority packets can be transmitted.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: February 6, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Jun-Yao Wang, Wen-Shyang Hwang, Wen-Fong Wang, Ce-Kuen Shieh
  • Publication number: 20050281286
    Abstract: A storage structure and method having multiple protocol processor units are disclosed. The storage structure comprises a host CPU, a main memory, a storage device, a switch fabric, and a host bus adapter module. The host bus adapter module includes a plurality of protocol processor nodes for processing frames received from a network, and storing those frames into the storage device. A processing module of the host bus adapter module extracts the session information of each frame and compares it with entries recorded in a look-up table. If the connection information hits one entry of the look-up table, the frame can be bypassed into a corresponding protocol processor node according to the definition of the look-up table. Otherwise, a new entry will be inserted into the look-up table for designating a corresponding protocol processor node.
    Type: Application
    Filed: November 3, 2004
    Publication date: December 22, 2005
    Applicant: Industrial Technology Research Institute
    Inventors: Jun-Yao Wang, Chung-Ho Chen, Chao-Lin Su, Chao-Hsien Hsu, Cheng-Yeh Yu, I-Cheng Chung
  • Publication number: 20030212812
    Abstract: The present invention discloses a multi-priority media access control method for a multi-channel slotted ring network. In the slotted ring networks, each node has one tunable transmitter and one fixed receiver for data channels, and is able to inspect slot status on all channels. The header slot format defines the slot priorities on ring networks and limits which packets can be transmitted through the slots. By assigning slot priority based on two thresholds to raise and lower slot priority, multiple priority packets can be transmitted.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 13, 2003
    Applicant: Industrial Technology Research Institute
    Inventors: Jun-Yao Wang, Wen-Shyang Hwang, Wen-Fong Wang, Ce-Kuen Shieh