Patents by Inventor Jun-yong Kim

Jun-yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10875431
    Abstract: A lumbar support apparatus for a vehicle seat includes: a seatback frame having an adjustable inclination angle; an operating mechanism disposed at an upper portion of the seatback frame, the operating mechanism including a connector generating an operating force in a vertical direction by being in contact with a fixture fixed to a vehicle body when the inclination angle of the seatback frame is adjusted; and a support mechanism disposed at a lower portion of the seatback frame, connected to the connector, receiving the operating force generated from the connecting mechanism, and configured to slide in a front and rear direction depending on an application direction of the operating force, such that when the inclination angle of the seatback frame is adjusted to be directed rearward, the support mechanism receives the operating force of the operating mechanism and is advanced forward to support a waist of an occupant.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: December 29, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Suk Won Hong, Jun Yong Kim, Seon Chae Na, Ji Sun Lee, Chan Ho Jung
  • Publication number: 20200156521
    Abstract: A lumbar support apparatus for a vehicle seat includes: a seatback frame having an adjustable inclination angle; an operating mechanism disposed at an upper portion of the seatback frame, the operating mechanism including a connector generating an operating force in a vertical direction by being in contact with a fixture fixed to a vehicle body when the inclination angle of the seatback frame is adjusted; and a support mechanism disposed at a lower portion of the seatback frame, connected to the connector, receiving the operating force generated from the connecting mechanism, and configured to slide in a front and rear direction depending on an application direction of the operating force, such that when the inclination angle of the seatback frame is adjusted to be directed rearward, the support mechanism receives the operating force of the operating mechanism and is advanced forward to support a waist of an occupant.
    Type: Application
    Filed: April 22, 2019
    Publication date: May 21, 2020
    Inventors: Suk Won HONG, Jun Yong KIM, Seon Chae NA, Ji Sun LEE, Chan Ho JUNG
  • Publication number: 20190281257
    Abstract: Provided is a video monitoring apparatus connectable to at least one camera which acquires at least one first video by photographing at least one monitoring area, the video monitoring apparatus including at least one processor to implement; a video display generator configured to display a second video of a display area which is included in the monitoring area; an event detector configured to detect whether an event has occurred in the monitoring area; and a marker display generator configured to display an event marker indicating occurrence of the event on the second video when the event has occurred in the monitoring area except the display area.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 12, 2019
    Applicant: HANWHA TECHWIN CO., LTD.
    Inventors: Doo Man KIM, Hyeon Gu HWANG, Jun Yong KIM, Gyeong Yeol PARK, Han Ki CHOI, Ho Jin CHOI
  • Publication number: 20180229343
    Abstract: A chemical mechanical polishing (CMP) device includes a rotatable CMP pad located on a polishing platen, a rotatable wafer carrier located on an upper portion of the CMP pad and including a wafer, and a surface-roughness measuring device which is located apart from a surface of the CMP pad in a vertical direction and measures surface roughness of the CMP pad, wherein the surface-roughness measuring device includes a sensor array having a plurality of sensors, and the sensor array is horizontally movable over the upper portion of the CMP pad.
    Type: Application
    Filed: August 17, 2017
    Publication date: August 16, 2018
    Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVER SITY
    Inventors: Ho-joong KIM, Jun-yong KIM, Tae-sung KIM, Seok-jun HONG
  • Patent number: 9966709
    Abstract: A connector, which is coupled to a first communication component, including: a connector body; a fitting portion, which is formed on one end of the connector body, configured to fix the connector body by being adhered to a wall of the first communication component; and a ground stabilization member coupled to the connector body and the first communication component, wherein the ground stabilization member includes: a fixing portion configured to fix the ground stabilization member to an inner wall of the connector body; an insertion portion inserted in an insertion hole of the first communication component, wherein a plurality of slots imparting elasticity are formed; and a ground contact portion configured to perform a grounding function by contacting an inner wall of the insertion hole due to the elasticity.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: May 8, 2018
    Assignee: INNERTRON, INC.
    Inventors: Hak Rae Cho, Kwang Myoung Heo, Jeoung II Shin, Jun Yong Kim
  • Publication number: 20180083400
    Abstract: A connector, which is coupled to a first communication component, including: a connector body; a fitting portion, which is formed on one end of the connector body, configured to fix the connector body by being adhered to a wall of the first communication component; and a ground stabilization member coupled to the connector body and the first communication component, wherein the ground stabilization member includes: a fixing portion configured to fix the ground stabilization member to an inner wall of the connector body; an insertion portion inserted in an insertion hole of the first communication component, wherein a plurality of slots imparting elasticity are formed; and a ground contact portion configured to perform a grounding function by contacting an inner wall of the insertion hole due to the elasticity.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 22, 2018
    Applicant: INNERTRON, INC.
    Inventors: Hak Rae CHO, Kwang Myoung HEO, Jeoung Il SHIN, Jun Yong KIM
  • Publication number: 20130158964
    Abstract: A method for providing a new workflow that reuses an existing workflow includes displaying one or more collections of existing workflows available for selection; receiving a selection of one of the one or more existing workflow collections; displaying one or more existing workflows associated with the selected existing workflow collection; receiving a selection of one of the existing workflows in the selected existing workflow collection; receiving a selection of a variable in the selected existing workflow to be used in the new workflow; and storing the new workflow such that, when executed, the new workflow utilizes the selected variable from the existing workflow.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 20, 2013
    Applicant: Microsoft Corporation
    Inventors: Gabriel J. Hall, Mauricio F. Ordonez, Darren S. Miller, Jun Yong Kim, Chong Youn Choe, Dae Il Kim, Hyong Guk Kim
  • Publication number: 20130152038
    Abstract: A system includes a workflow design application further including a user interface for displaying at least one project server platform type available for selection, and a project mode module configured to retrieve at least one available customizable project workflow component from the project server via a project server application programming interface (API). The user interface is configured to receive a project server platform type selection via the user interface, and, upon receiving the project server platform type selection, display the retrieved at least one customizable project workflow component, receive at least one customizable project workflow component selection, receive a customization selection for the selected customizable project workflow component, and receive a request to generate at least a portion of a project workflow based on the customization selection for the selected customizable project workflow component.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: JongHwa Lim, Samuel Chung, Yong Jin Kim, Soo Youn Cho, Duhoi Heo, Chang Youl Hong, Jun Yong Kim, Daniel Broekman, Ina Teegan, John Thoni
  • Patent number: 8030150
    Abstract: A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: October 4, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-ho Kwon, Chang-ki Hong, Bo-un Yoon, Jun-yong Kim
  • Publication number: 20090159952
    Abstract: A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures.
    Type: Application
    Filed: March 4, 2009
    Publication date: June 25, 2009
    Inventors: Byoung-ho KWON, Chang-ki Hong, Bo-un Yoon, Jun-yong Kim
  • Patent number: 7535052
    Abstract: A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: May 19, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-ho Kwon, Chang-ki Hong, Bo-un Yoon, Jun-yong Kim
  • Publication number: 20080176403
    Abstract: In a method of chemically and mechanically polishing a layer, a substrate on which the layer having stepped portions is formed is prepared. The layer is primarily chemically and mechanically polished at a temperature of about 30° C. to about 80° C. to remove the stepped portions of the layer. The layer is secondarily chemically and mechanically polished without the stepped portions at a temperature of about 5° C. to about 25° C. to form a flat layer having a desired thickness. Thus, the stepped portions may be rapidly removed in an initial period so that the method may have an improved throughput.
    Type: Application
    Filed: November 8, 2007
    Publication date: July 24, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-Yong Kim, Chang-Ki Hong, Bo-Un Yoon, Byoung-Ho Kwon
  • Publication number: 20080017915
    Abstract: A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures.
    Type: Application
    Filed: June 14, 2007
    Publication date: January 24, 2008
    Inventors: Byoung-ho KWON, Chang-ki Hong, Bo-un Yoon, Jun-yong Kim
  • Publication number: 20070291170
    Abstract: An image resolution conversion method and apparatus based on a projection onto convex sets (POCS) method are provided. The image resolution conversion method comprises detecting an edge region and a direction of the edge region in an input low-resolution image frame in order to generate an edge map and edge direction information, generating a directional point spread function based on the edge map and the edge direction information, interpolating the input low-resolution image frame into a high-resolution image frame, generating a residual term based on the input low-resolution image frame, the high-resolution image frame, and the directional point spread function, and renewing the high-resolution image frame according to a result of comparing the residual term with a threshold.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 20, 2007
    Applicants: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Sogang University
    Inventors: Seung-hoon Han, Seung-joon Yang, Rae-hong Park, Jun-yong Kim
  • Publication number: 20070184663
    Abstract: Example embodiments are directed to a method of planarizing a semiconductor device. A first CMP process may be performed on an insulating layer to remove a stepped structure of the insulating layer. A second CMP process may be performed to planarize the insulating layer with the stepped structure removed until a given pattern is exposed. A process temperature of the first CMP process may be higher than that of the second CMP process. Accordingly, an initial stepped structure may be more readily removed in a planarization process of a surface of the semiconductor device, which may reduce the CMP process time and may increase the degree of planarization.
    Type: Application
    Filed: February 5, 2007
    Publication date: August 9, 2007
    Inventors: Jun-Yong Kim, Ho-Young Kim, Chang-Ki Hong, Bo-Un Yoon, Sung-Ho Shin
  • Patent number: 5944580
    Abstract: An improved sensing device and method for leveling a semiconductor wafer in a chemical mechanical polishing apparatus, which easily detects the change of pressure from a semiconductor wafer contacting with the polishing surface. The present invention includes a polishing platen having a polishing pad on the upper leveled surface thereof, and fixed to a rotatable platen driving shaft. A carrier is rotatably provided on the upper surface of the polishing platen and holding the semiconductor wafer such that the lower surface of the semiconductor wafer is uniformly contacted with the polishing pad. A pressure detecting sensor senses the pressure applied from the semiconductor wafer on the polishing pad and outputs a corresponding signal.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: August 31, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Yong-Kwon Kim, Jun-Yong Kim