Patents by Inventor Jun YOSHIKI

Jun YOSHIKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140092636
    Abstract: A gate electrode is formed above a compound semiconductor stacked structure, and the gate electrode includes a stack of a TaN:Al layer in which Al is solid-dissolved in TaN, a TaAlN layer made of a compound of TaN and Al, and an Al layer.
    Type: Application
    Filed: August 26, 2013
    Publication date: April 3, 2014
    Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITED
    Inventors: Masahito Kanamura, Jun YOSHIKI