Abstract: A display panel and a preparation method thereof. One photomask is used to form a patterned photoresist layer. The photoresist layer is used as a mask to form a patterned first inorganic pixel definition layer and a patterned second inorganic pixel definition layer. Based on the fact that both a baking temperature and a baking time for preparing the photoresist layer by using a conventional method are lower than a heating temperature and a heating time in a thermal process for preparing an organic pixel definition layer, in embodiments of the present disclosure, the influence of the thermal process on the thin film transistor can be reduced, thereby reducing the risk of negative bias of the thin film transistor and the number of the used photomasks.

Abstract: Examples related to ranking offers based on machine learning are disclosed. An example may involve: receiving a request for ranking a plurality of offers associated with an item; generating offer related feature data based on the request; inputting the offer related feature data into a machine learning model to generate an order conversion score for each of the plurality of offers; generating, from the plurality of offers, a ranked list of offers based on their respective order conversion scores; and transmitting the ranked list of offers to a computing device.

Abstract: A thin-film transistor, a display panel, and a display device are provided. The thin-film transistor includes an active layer and a gate disposed on a side of the active layer; a material of the active layer includes an oxide semiconductor material and a first metal element doped in the oxide semiconductor material, and the first metal element includes terbium.

Abstract: A semiconductor device, an array substrate, and a display panel are provided. The semiconductor device includes an active layer; a gate disposed on a side of the active layer; and a source and a drain respectively connected to opposite ends of the active layer. The active layer comprises one or more first sublayers, each of the first sublayers includes a metal oxide conductive material and an electrical regulating element doped in the metal oxide conductive material. The electrical regulating element includes at least one of Group VIII metal elements.

Abstract: A semiconductor device and a display panel are provided. The semiconductor device comprises an active layer comprising a first semiconductor layer, and the first semiconductor layer comprises an N-type metal oxide semiconductor material, and a first doping element and/or a second doping element doped in the N-type metal oxide semiconductor material. The first doping element is a metal element and an oxide of the first doping element is a P-type semiconductor material; and a bond energy of a chemical bond between the second doping element and an oxygen atom greater than a bond energy of a chemical bond between at least a part of metal elements in the N-type metal oxide semiconductor material and the oxygen atom.

Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and a first transistor and a second transistor disposed on the base substrate. A mobility of a first active layer of the first transistor is different from a mobility of a second active layer of a second transistor. At most one gate insulating layer is provided between the first active layer and the second active layer, and the first active layer is located in a non-perpendicular direction of the second active layer. One of a first gate, the first active layer, and a first source of the first transistor is disposed in the same layer as a second gate of the second transistor.

Abstract: A display panel, a method for manufacturing the display panel, and a display device. The display panel includes a substrate, a buffer layer, an active layer, a gate insulating layer, and a gate layer. At least one of the buffer layer and the gate insulating layer has a laminated structure formed by stacking two layers of the same material, and the hydrogen content in the film layer of the laminated structure adjacent to the active layer is lower than that in the film layer of the laminated structure away from the active layer. The active layer is provided as a laminated structure formed by the first active sublayer and the second active sublayer, and the mobility of the first active sublayer is made greater than that of the second active sublayer.

Abstract: The present disclosure provides a display device including a display panel. The display panel includes driving circuits in a plurality of cascaded stages, each of the driving circuits includes a gate driving signal sub-circuit, an initialization signal sub-circuit, and a reference signal sub-circuit. The gate driving signal sub-circuit, the initialization signal sub-circuit, and the reference signal sub-circuit each includes a plurality of oxide semiconductor transistors. A bottom gate of the oxide semiconductor transistor which is prone to negative bias effect is electrically connected to a potential control signal input terminal.

Abstract: A display panel, a method for preparing a display panel, and a display device are provided. The display panel includes a substrate, a light shielding layer, a second electrode plate, a first source-drain layer and a second source-drain layer, the light shielding layer includes a first electrode plate, the first source-drain layer includes a conductive electrode, the second source-drain layer is disposed on a side of the first source-drain layer away from the substrate, and the second source-drain layer includes a third electrode plate. The third electrode plate is used as a capacitor electrode, the third electrode plate is extended toward a direction of the second electrode plate, and the third electrode plate is electrically connected to the first electrode plate through the conductive electrode, so that the third electrode plate, the second electrode plate and the first electrode plate are overlapped to form a capacitor.

Abstract: A thin film transistor and a display panel are provided. The thin film transistor includes an active layer including a first semiconductor layer, the first semiconductor layer includes a metal oxide conductor material and a metal element M doped in the metal oxide conductor material, and the metal element M is at least one element selected from the group consisting of lanthanide elements and transition elements.

Abstract: An array substrate, a method for manufacturing the same, and a display panel are provided. The array substrate includes a pixel arrangement area and a non-pixel arrangement area adjacent to the pixel arrangement area, and further includes a first transistor disposed in the pixel arrangement area and a second transistor disposed in the non-pixel arrangement area, where the first transistor includes a first active portion, the second transistor includes a second active portion, the first active portion includes a first metal oxide material, the second active portion includes a second metal oxide material different from the first metal oxide material, and a mobility of the second active portion is greater than a mobility of the first active portion.

Abstract: A display panel and a display device are provided. The display panel includes a first thin film transistor and a capacitor disposed in a region where a pixel opening is provided, the capacitor includes at least three electrode plates stacked and spaced apart, and a difference between a height of the first thin film transistor and a height of the capacitor is less than 4500 angstroms based on a surface of a substrate close to an anode.

Abstract: The present disclosure provides a display device including a display panel. The display panel includes driving circuits in a plurality of cascaded stages, each of the driving circuits includes a gate driving signal sub-circuit, an initialization signal sub-circuit, and a reference signal sub-circuit. The gate driving signal sub-circuit, the initialization signal sub-circuit, and the reference signal sub-circuit each includes a plurality of oxide semiconductor transistors. A bottom gate of the oxide semiconductor transistor which is prone to negative bias effect is electrically connected to a potential control signal input terminal.

Abstract: Disclosed is a method for preparing a proton-conductive material from sulfamic acid(SA)@NH2-UiO-66. A method for preparing SA@NH2-UiO-66 includes the steps of first synthesizing NH2-UiO-66 through a solvothermal reaction of zirconium tetrachloride and 2-aminoterephthalic acid, and then encapsulating SA by a continuous dynamic concentration encapsulation method.

Abstract: A backside emitter solar cell structure having a heterojunction. On one side edge of the backside emitter solar cell structure having the heterojunction, on an edge region of a crystalline semiconductor substrate of the backside emitter solar cell structure having the heterojunction having a doping of a first conductivity type, there is a layer sequence with a double intrinsic layer formed.

Abstract: The present disclosure provides an electronic expansion valve, which includes: a valve body having an accommodating cavity and a valve port, and the valve port communicates with the accommodating cavity; a guide sleeve, which is disposed in the accommodating cavity; a valve head, which is movably disposed in the guide sleeve and configured for blocking or opening the valve port, and a balance channel is disposed in the valve head so as to enable two ends of the valve head to be communicated; the valve head has a first end and a second end which are oppositely disposed, the first end is configured for blocking the valve port, a refrigerant medium and the first end have a first stress area S1, the refrigerant medium and the second end have a second stress area S2, and ?1.3 mm2?S1?S2?1.3 mm2.

Abstract: A contact module for an electrical connector includes: an insulator; and a row of contacts insert-molded with the insulator, each of the row of contacts including a soldering tail and a body having a securing portion and a contacting portion, the soldering tail of each contact pointing toward a forward direction, wherein the securing portion of each contact has an upper level segment, a front upstanding segment continuing the upper level segment, a lower level segment continuing the front upstanding segment, and a rear upstanding segment continuing the lower level segment and connecting to the soldering tail thereof, and the lower level segment of each contact is offset from the soldering tail thereof.

Abstract: The present disclosure discloses a method and system for cementing simulation and gas-water back-invasion evaluation in complex formations, and relates to oil and natural gas extraction technologies. The evaluation system is provided with a simulated formation, a buffer space, a cement ring and a casing, and a movable bottom plate; two groups of hydraulic cylinders are provided below the movable bottom plate to test a shear force of a secondary interface and a compressive strength of the cement ring, respectively; the casing has a casing cavity and a cement return hole, and the cement ring is formed after cement returns and solidifies; and sonic logging probes and a gas detection device are provided within a reaction vessel. The evaluation method adopts the evaluation system described above for evaluation.

Abstract: A human-computer interaction control method for welding comprises: in response to triggering of a scheme switching control on a main menu bar, displaying a scheme switching interface on a human-computer interaction device; on the basis of a scheme uploading selection box, determining, from a scheme uploading library, a target scheme to be uploaded, and displaying an identifier of the target scheme to be uploaded in the scheme uploading selection box; when the target scheme to be uploaded has been determined and a scheme uploading control has been enabled, updating a current scheme corresponding to the current scheme selection box and displaying same as the target scheme; and on the basis of working parameters of the target scheme, controlling a battery welding process device to perform welding work on a current battery to be welded.

Abstract: A diagonalized spatial smoothing coherent DOA estimation method based on non-circular signals includes the following steps: firstly, receiving non-circular signals through a uniform linear array antenna to obtain received information; according to non-circular characteristics of the signals, concatenating the received information and the conjugate to form extended received information, and calculating the covariance matrix; then extracting subarrays from the covariance matrix diagonally, and performing augmented spatial smoothing operation on the extracted subarrays; splicing the results of smoothing operations to generate a new covariance matrix, and performing eigenvalue decomposition on the new covariance matrix to obtain a noise subspace; finally, based on the noise subspace, estimating the DOA of the non-circular signal by the reduced-dimension MUSIC algorithm.