Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

Abstract: A semiconductor device includes a substrate including a first active pattern and a second active pattern that are spaced apart from each other in a first direction that is parallel to a top surface of the substrate, a first source/drain pattern on the first active pattern, a second source/drain pattern on the second active pattern, a first active contact on the first source/drain pattern, a second active contact on the second source/drain pattern, and a cutting pattern between the first active contact and the second active contact, where the cutting pattern may include a first cutting pattern between the first active contact and the second active contact, the first cutting pattern extending toward the substrate, and a second cutting pattern on at least one lateral surface of the first cutting pattern and a bottom surface of the first cutting pattern, the second cutting pattern exposing at least a portion of the at least one lateral surface of the first cutting pattern.

Abstract: A semiconductor device includes: an active region on a substrate; a gate structure intersecting the active region and including a gate electrode; a source/drain region on the active region; a first contact structure on and connected to the source/drain region; first and second insulating layers on the gate and first contact structures; a second contact structure connected to the gate electrode and including: a first contact via in the first insulating layer; and a first conductive cap layer in the second insulating layer and on the first contact via; a via structure connected to the first contact structure, the via structure including: a second contact via in the first insulating layer; and a second conductive cap layer in the second insulating layer and on the second contact via; and interconnection lines on the second insulating layer connected to the second contact structure and the via structure.

Abstract: A semiconductor device includes a substrate; an active pattern extending on the substrate in a first direction; a plurality of channel layers on the active pattern; a gate structure surrounding the plurality of channel layers, and extending in a second direction that intersects the first direction; blocking insulating layers on both side surfaces of the gate structure, respectively, each of the blocking insulating layers having an upper region having a first thickness and a lower region having a second thickness smaller than the first thickness; source/drain patterns on portions of the active pattern on both sides of the gate structure, the source/drain patterns defining trenches therein; contact structures on the source/drain patterns and filling the trenches; and a metal-semiconductor compound layer between the source/drain patterns and the contact structures.

Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.