Patents by Inventor Jun Dal KIM
Jun Dal KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11876515Abstract: A transceiver includes a transmitter and a receiver coupled to each other through a first line and a second line. The transmitter transmits a first voltage signal of a second logic level or a fourth logic level, among a first logic level, the second logic level, a third logic level, and the fourth logic level, through the first line. The transmitter transmits a second voltage signal of the first logic level or the third logic level through the second line. The receiver generates an output signal having one of four values based on the first voltage signal and the second voltage signal.Type: GrantFiled: May 26, 2022Date of Patent: January 16, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jong Man Bae, Hyun Su Kim, Jun Dal Kim, Dong Won Park, Young Suk Jung
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Publication number: 20230327845Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1?1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1?1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.Type: ApplicationFiled: June 9, 2023Publication date: October 12, 2023Inventors: Hyun Su KIM, Dong Won PARK, Jun Dal KIM, Kyung Youl MIN, Jong Man BAE, Jun Yong SONG, Tae Young JIN
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Publication number: 20230318860Abstract: A transmitter includes a transmission controller which outputs original data through an original data lane, an encoder which encodes the original data into encoded data and outputs the encoded data through an encoded data lane, and a transmission driver which outputs the encoded data at a speed of M (M is a real number greater than 0) gigabits per second through a transmission and reception interface. The transmission driver provides a first clock signal corresponding to an output speed to the encoder, the encoder provides a second clock signal having a second frequency less than a first frequency of the first clock signal to the transmission controller, the transmission controller outputs the original data based on the second clock signal, and the encoder outputs the encoded data based on the first clock signal.Type: ApplicationFiled: March 30, 2023Publication date: October 5, 2023Inventors: Tae Young JIN, Jun Dal KIM, Hyun Su KIM, Kyung Youl MIN, Dong Won PARK, Jong Man BAE
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Patent number: 11677536Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1-1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1-1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.Type: GrantFiled: January 13, 2022Date of Patent: June 13, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hyun Su Kim, Dong Won Park, Jun Dal Kim, Kyung Youl Min, Jong Man Bae, Jun Yong Song, Tae Young Jin
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Publication number: 20230170997Abstract: A transceiver includes a transmitter and a receiver which are connected to each other through a first line and a second line. The transmitter transmits a first clock training pattern to the receiver in a first period, transmits a second clock training pattern and a first first payload to the receiver in a second period, and transmits a third clock training pattern and a second first payload to the receiver in a third period. The first clock training pattern, the second clock training pattern, and the third clock training pattern are variable based on a plurality of driving modes.Type: ApplicationFiled: October 4, 2022Publication date: June 1, 2023Inventors: Dong Won PARK, Jun Dal KIM, Hyun Su KIM, Jong Man BAE, Jun Yong SONG, Tae Young JIN
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Patent number: 11558080Abstract: A transceiver device includes a transmitter and a receiver connected through first and second lines. A first frame period includes an active period for transmitting a first payload and a vertical blank period including a frequency hopping period. The transmitter transmits, to the first and second lines, signals having a first voltage range in a first mode and signals having a second voltage range in a second mode. The transmitter generates a first horizontal synchronization signal in the second mode except for the frequency hopping period, encodes the first horizontal synchronization signal to horizontal synchronization data, and generates a second horizontal synchronization signal in the first mode in the frequency hopping period. The transmitter adds a first clock training pattern to the horizontal synchronization data except for the frequency hopping period, and adds a second clock training pattern to first horizontal synchronization data after the frequency hopping period.Type: GrantFiled: January 14, 2022Date of Patent: January 17, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Tae Young Jin, Dong Won Park, Jun Dal Kim, Hyun Su Kim, Kyung Youl Min, Jong Man Bae, Jun Yong Song
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Publication number: 20220416841Abstract: A transceiver device includes a transmitter and a receiver connected through first and second lines. A first frame period includes an active period for transmitting a first payload and a vertical blank period including a frequency hopping period. The transmitter transmits, to the first and second lines, signals having a first voltage range in a first mode and signals having a second voltage range in a second mode. The transmitter generates a first horizontal synchronization signal in the second mode except for the frequency hopping period, encodes the first horizontal synchronization signal to horizontal synchronization data, and generates a second horizontal synchronization signal in the first mode in the frequency hopping period. The transmitter adds a first clock training pattern to the horizontal synchronization data except for the frequency hopping period, and adds a second clock training pattern to first horizontal synchronization data after the frequency hopping period.Type: ApplicationFiled: January 14, 2022Publication date: December 29, 2022Inventors: Tae Young JIN, Dong Won PARK, Jun Dal KIM, Hyun Su KIM, Kyung Youl MIN, Jong Man BAE, Jun Yong SONG
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Publication number: 20220397931Abstract: A transceiver includes a transmitter and a receiver connected to each other by a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range smaller than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload in the second mode to generate a first payload, and transmits the clock training pattern and the first payload through the first line and the second line.Type: ApplicationFiled: January 12, 2022Publication date: December 15, 2022Inventors: Jun Yong SONG, Jong Man BAE, Jun Dal KIM, Hyun Su KIM, Kyung Youl MIN, Dong Won PARK, Tae Young JIN
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Publication number: 20220399915Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. When transmitting a first payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and the transmitter transmits a clock training pattern and the first payload in the second mode.Type: ApplicationFiled: January 12, 2022Publication date: December 15, 2022Inventors: Hyun Su KIM, Kyung Youl MIN, Jun Dal KIM, Jong Man BAE
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Publication number: 20220399986Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1-1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1-1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.Type: ApplicationFiled: January 13, 2022Publication date: December 15, 2022Inventors: Hyun Su KIM, Dong Won PARK, Jun Dal KIM, Kyung Youl MIN, Jong Man BAE, Jun Yong SONG, Tae Young JIN
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Publication number: 20220397932Abstract: A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.Type: ApplicationFiled: March 25, 2022Publication date: December 15, 2022Inventors: Jun Dal KIM, Dong Won PARK, Hyun Su KIM, Kyung Youl MIN, Jong Man BAE, Jun Yong SONG, Tae Young JIN
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Publication number: 20200202816Abstract: A display device includes a display panel, a timing controller for detecting a frame frequency of input data, for generating a control signal based on the frame frequency, and for generating frame data by converting the input data, and a source drive for variably amplifying the frame data based on the control signal, for generating a data signal based on the amplified frame data, and for providing the data signal to the display panel.Type: ApplicationFiled: August 23, 2019Publication date: June 25, 2020Inventors: Dong In KIM, Jun Dal KIM
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Patent number: 10647956Abstract: The purpose of the present invention is to provide a method for isolating, removing and analyzing cells. Provided is a method for isolating, removing and analyzing cells by filtering a liquid specimen containing cells through a porous polyimide film, and subjecting the cells captured by the film which did not pass through the porous polyimide film, or the cells in the liquid specimen which did pass through the porous polyimide film, to an examination of one or more cell properties selected from a group consisting of cell number or type, internal or external cell structure, type or amount of cell surface antigen, type or amount of material secreted from cells, cell adhesion, and cell survival rate.Type: GrantFiled: January 26, 2016Date of Patent: May 12, 2020Assignees: UBE INDUSTRIES, LTD., UNIVERSITY OF TSUKUBAInventors: Akiyoshi Fukamizu, Jun-Dal Kim, Masahiko Hagihara, Yukinori Wada
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Patent number: 10083671Abstract: A DC-DC converter includes a power switch and a switching controller. The power switch is repetitively turned on and off for generating an output DC voltage based on an input DC voltage. The switching controller controls operation of the power switch, and includes a slew rate controller to adjust a slew rate of a switch voltage of an electrode of the power switch to vary with time.Type: GrantFiled: October 22, 2015Date of Patent: September 25, 2018Assignee: Samsung Display Co., Ltd.Inventors: Jong-Jae Lee, Yang-Uk Nam, Jun-Ki Hong, Jun-Dal Kim, Jang-Hee Park
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Publication number: 20180016542Abstract: The purpose of the present invention is to provide a method for isolating, removing and analyzing cells. Provided is a method for isolating, removing and analyzing cells by filtering a liquid specimen containing cells through a porous polyimide film, and subjecting the cells captured by the film which did not pass through the porous polyimide film, or the cells in the liquid specimen which did pass through the porous polyimide film, to an examination of one or more cell properties selected from a group consisting of cell number or type, internal or external cell structure, type or amount of cell surface antigen, type or amount of material secreted from cells, cell adhesion, and cell survival rate.Type: ApplicationFiled: January 26, 2016Publication date: January 18, 2018Inventors: Akiyoshi FUKAMIZU, Jun-Dal KIM, Masahiko HAGIHARA, Yukinori WADA
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Patent number: 9747861Abstract: A driving voltage generating device, a display device including the same, and a method of generating a driving voltage are provided. The driving voltage generating device includes a driving voltage setting unit receiving initially set data on a driving voltage and a feedback voltage and outputting a control signal, a driving voltage trimmer receiving finely adjusted data on the driving voltage and adjusting the feedback voltage, and a DC to DC converter generating the driving voltage based on the control signal and an input voltage.Type: GrantFiled: June 17, 2014Date of Patent: August 29, 2017Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Yang Uk Nam, Jong Jae Lee, Bon-Sung Koo, Jun Dal Kim, Se Young Heo, Jun Ki Hong
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Patent number: 9672087Abstract: Exemplary embodiments of present invention relate to an error detecting apparatus for a gate driver improving a reliability of a display apparatus, a display apparatus having the error detecting apparatus, and a method of detecting an error of the gate driver using the error detecting apparatus. An exemplary embodiment discloses an error detecting apparatus including an error detecting part configured to receive a gate signal of a gate driver and determine whether a status of the gate driver is in a normal status or an error status based on the gate signal, a memory configured to store the status of the gate driver, and a signal outputting part configured to selectively output a clock signal and an error signal based on the status of the gate driver stored in the memory.Type: GrantFiled: July 15, 2014Date of Patent: June 6, 2017Assignee: Samsung Display Co., Ltd.Inventors: Jong-Jae Lee, Eui-Dong Hwang, Bon-Sung Koo, Jun-Dal Kim, Seung-Hwan Moon, Dong-Won Park
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Patent number: 9666135Abstract: Provided is a display device, including: a plurality of pixels; a scan driver connected to a plurality of scanning lines connected to the plurality of pixels; and a gate signal generator configured to determine a level of a gate-on voltage according to ambient temperature and to supply the gate-on voltage to the scan driver, wherein the gate signal generator is further configured to apply a hysteresis characteristic to a thermistor voltage to vary according to the ambient temperature.Type: GrantFiled: July 11, 2014Date of Patent: May 30, 2017Assignee: Samsung Display Co., Ltd.Inventors: Bon-Sung Koo, Jong Jae Lee, Eui-Dong Hwang, Jun Dal Kim, Yang Uk Nam
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Patent number: 9570027Abstract: A method of method of protecting a gate driver circuit configured to provide a gate line of a display panel with a gate signal includes generating a clock signal to drive the gate driver circuit, sensing an output current of the clock signal, detecting an overcurrent of the clock signal based on an overcurrent determining factor, determining whether the clock signal is in an overcurrent condition based on a count number of the overcurrent, generating a shutdown signal when the clock signal is in the overcurrent condition and blocking the clock signal from being applied to the gate driver circuit based on the shutdown signal.Type: GrantFiled: August 7, 2014Date of Patent: February 14, 2017Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jun-Dal Kim, Jong-Jae Lee, Bon-Sung Koo, Yang-Uk Nam, Se-Young Heo
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Publication number: 20160118875Abstract: A DC-DC converter includes a power switch and a switching controller. The power switch is repetitively turned on and off for generating an output DC voltage based on an input DC voltage. The switching controller controls operation of the power switch, and includes a slew rate controller to adjust a slew rate of a switch voltage of an electrode of the power switch to vary with time.Type: ApplicationFiled: October 22, 2015Publication date: April 28, 2016Inventors: Jong-Jae LEE, Yang-Uk NAM, Jun-Ki HONG, Jun-Dal KIM, Jang-Hee PARK