Patents by Inventor June CHOI
June CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12361668Abstract: The present disclosure relates to a method and an apparatus for measuring motility of ciliated cells in a respiratory tract. The method includes the operations of: acquiring image data including a plurality of frames of respiratory tract organoids; identifying positions of ciliated cells by performing motion-contrast imaging on the image data; when a region of interest (ROI) related to the position of the ciliated cells is selected, measuring a ciliary beat frequency (CBF) related to motility of cilia included in the selected region of interest using cross-correlation between the plurality of frames; and expressing the cilia included in the region of interest in a preset display method on the basis of the range of the measured ciliary beat frequency.Type: GrantFiled: July 11, 2022Date of Patent: July 15, 2025Assignee: CHUNG ANG UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATIONInventors: Jun Ki Kim, Woo June Choi
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Patent number: 12351689Abstract: A networked silicone is disclosed. The networked silicone comprises crosslinked strands of looped organosilicon compounds. A composition for preparing the networked silicone is also disclosed, and comprises (A) a looped organosilicon compound, (B) a crosslinking organosilicon compound, and optionally (C) a catalyst. Additionally, a method of preparing the networked silicone is disclosed, and comprises reacting the looped organosilicon compound (A) and the crosslinking organosilicon compound (B), optionally in the presence of the catalyst (C), to give the networked silicone. A reaction product comprising the networked silicone is also disclosed. The reaction product is prepared from the composition and/or in accordance with the method, and may be a cured product. Additionally, a composite article and a method of forming the same are disclosed.Type: GrantFiled: July 22, 2020Date of Patent: July 8, 2025Assignees: DOW SILICONES CORPORATION, MASSACHUSETTS INSTITUTE OF TECHNOLOGYInventors: Bizhong Zhu, Kaila Mattson, Jeremiah A. Johnson, Deborah June Choi Ehrlich
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Publication number: 20250209595Abstract: Provided is a method of detecting a surface defect. The method includes acquiring a target image, detecting at least one defect area from the target image, generating a first defect matrix having a size corresponding to the target image and an element that is a first defect score calculated based on the number of defect areas, calculating a plurality of second defect scores by summing first defect scores in a range corresponding to a predetermined reference window in the first defect matrix, and extracting an image corresponding to the reference window from the target image based on the second defect score and generating a defect image.Type: ApplicationFiled: December 27, 2023Publication date: June 26, 2025Inventors: Jin Kyu GAHM, Il Hae YU, Won June CHOI
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Publication number: 20250178184Abstract: The present invention relates to a wearable robot for assisting back muscle strength, comprising: an upper wearing part worn on the upper body; a back muscle strength assisting part that can be fixed to the upper wearing part; and a lower wearing part connected to a lower end portion of the back muscle strength assisting part, wherein the back muscle strength assisting part comprises a housing that can be fixed to the upper wearing part, a plurality of elastic members arranged in series or parallel within the housing, a moving part connected to the bottom of the elastic members and connected to the lower wearing part so as to slide up and down, and a rigidity control part that adjusts the rigidity of the elastic members.Type: ApplicationFiled: August 24, 2023Publication date: June 5, 2025Applicant: WIRobotics Inc.Inventors: Byung June CHOI, Yongjae KIM, Younbaek LEE, Changhyun ROH, Bokman LIM, Jewoo LEE
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Publication number: 20250145484Abstract: In a method for preparing lithium sulfide, a solid sulfur layer and a lithium source layer are sequentially arranged in a reactor. A gas feed is injected into the reactor in a single direction to obtain a lithium sulfide-containing product. The lithium sulfide-containing product is dissolved in an anhydrous solvent to form a lithium sulfide-containing solution. Lithium sulfide is separated from the lithium sulfide-containing solution. The gas feed sequentially passes through the solid sulfur layer and the lithium source layer, such that high-purity lithium sulfide may be efficiently prepared.Type: ApplicationFiled: October 30, 2024Publication date: May 8, 2025Inventors: Suk Joon HONG, Min June CHOI, Ji Min KIM, Wan Uk CHOI, Je Nam CHOI
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Patent number: 12292401Abstract: Disclosed is a weld portion inspection method using thermal image sensing, wherein the method includes heating the weld portion using Joule heat; and determining whether the weld portion is defective based on a temperature increase pattern of the weld portion by the heating.Type: GrantFiled: October 21, 2020Date of Patent: May 6, 2025Assignee: LG ENERGY SOLUTION, LTD.Inventors: Mun Chae Joung, Hang June Choi
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Publication number: 20250105148Abstract: Embodiments of the disclosure are in the field of integrated circuit structure fabrication. In an example, an integrated circuit structure includes a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines having a first width and a first composition, and a second one of the plurality of conductive lines having a second width and a second composition. The second width greater than the first width, and the second composition is different than the first composition. The second one of the plurality of conductive lines has an uppermost surface above an uppermost surface of the first one of the plurality of conductive lines.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Inventors: Marvin PAIK, June CHOI, Shao Ming KOH, Supanee SUKRITTANON, Ananya DUTTA, Sudipto NASKAR
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Publication number: 20250091865Abstract: In a method of preparing lithium sulfide, a solid sulfur layer, a catalyst layer and a lithium source layer are sequentially arranged in a reactor. A reaction gas is injected into the reactor in a single direction. The reaction gas sequentially passes through the solid sulfur layer, the catalyst layer and the lithium source layer to obtain a high-purity lithium sulfide.Type: ApplicationFiled: September 17, 2024Publication date: March 20, 2025Inventors: Suk Joon HONG, Min June CHOI, Ji Min KIM, Wan Uk CHOI, Je Nam CHOI
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Publication number: 20240316755Abstract: The present invention relates to a wearable robot. The wearable robot according to the present invention comprises: a first fixing unit fixed to a body part on one side of a joint part; a second fixing unit fixed to the body part on the other side of the joint part; a driving unit fixed to the first fixing unit; and a connection member that connects the driving unit and the second fixing unit and transmits a driving force provided from the driving unit to the second fixing unit for movement of the joint part, wherein the connection member includes: a plurality of members which are adjustable in length to correspond to a distance between the driving unit and the second fixing unit, which varies according to the size of the joint part, or are disposed in a line; and an interlocking unit connecting the plurality of members such that the plurality of members interlock with each other, wherein the driving unit includes an actuator that generates power for assisting force.Type: ApplicationFiled: December 15, 2022Publication date: September 26, 2024Applicant: WIRobotics Inc.Inventors: Younbaek LEE, Byung June CHOI, Yongjae KIM, Changhyun ROH, Bokman LIM
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Patent number: 12042976Abstract: A punch pin hole inspection apparatus and method uses a punch and a die capable of checking defects or damage, specifically pin holes or microcracks, due to shaping immediately after finishing shaping a laminate sheet into a battery case using the punch.Type: GrantFiled: November 4, 2021Date of Patent: July 23, 2024Assignee: LG Energy Solution, Ltd.Inventors: Ho June Chi, Hang June Choi, Jeong Oh Moon, Jin Yong Park
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Publication number: 20240238148Abstract: The present invention relates to a wearable robot. The wearable robot includes a first fixing unit mounted on one body portion of the joint part; a second fixing unit mounted on the other body portion of the joint part; a driving unit connected to the first fixing unit; and a connecting member that connects the driving unit and the second fixing unit and transmits driving force provided from the driving unit to the second fixing unit. A length of the connecting member is adjusted in accordance with a distance between the driving unit and the second fixing unit.Type: ApplicationFiled: December 14, 2022Publication date: July 18, 2024Applicant: WIRobotics Inc.Inventors: Younbaek LEE, Byung June CHOI, Yongjae KIM, Changhyun ROH, Bokman LIM
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Patent number: 12017432Abstract: Provided are a double-sided adhesive tape for a display and a manufacturing method therefor, the double-sided adhesive tape sequentially including: a first acrylic adhesive layer; an acrylic foaming layer; a thermoplastic film layer having a black layer laminated on at least one surface thereof; and a second acrylic adhesive layer.Type: GrantFiled: March 22, 2016Date of Patent: June 25, 2024Assignee: LG Hausys, Ltd.Inventors: Ji-Hye Kim, Hong-June Choi, Joon-Seung Lee, Jang-Soon Kim, Woo-Joo Han, Ki-Seung Seo
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Patent number: 12017400Abstract: To solve the above problem, a pouch forming apparatus according to an embodiment of the present invention includes: a die in which a forming space is recessed inward from a top surface thereof; a partition wall partitioning the forming space into first and second forming spaces; a stripper disposed above the die and configured to descend to contact the die with the pouch film therebetween to fix the pouch film to be seated on a top surface of the die; and an electromagnetic force generation part disposed above the forming space and configured to generate electromagnetic force and configured to apply the electromagnetic force to the forming space.Type: GrantFiled: January 17, 2023Date of Patent: June 25, 2024Assignee: LG Energy Solution, Ltd.Inventors: Tai Jin Jung, Hang June Choi, Kun Ha Park, Cha Hun Ku, Jung Kwan Pyo
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Publication number: 20240170394Abstract: Integrated circuitry comprising an interconnect level with multi-height lines contacted by complementary multi-height vias. In some examples, a first line of a taller height is contacted by a first via of a shorter height while a second line of a shorter height is contacted by a second via of a taller height. The first and second vias and first and second lines may be subtractively defined concurrently from a same stack of conductive material layers such that the first via comprises a first conductive material layer, and the first line comprises second and third conductive material layers while the second via comprises the first and second conductive material layers and the second line comprises the third conductive material layer.Type: ApplicationFiled: November 22, 2022Publication date: May 23, 2024Applicant: Intel CorporationInventors: Elijah Karpov, June Choi, Manish Chandhok, Miriam Reshotko, Matthew Metz
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Publication number: 20240145383Abstract: An integrated circuit structure includes a device layer including a first set of devices and a second set of devices. An interconnect layer is above the device layer, where the interconnect layer includes one or more conductive interconnect features within dielectric material. In an example, a first ring structure including conductive material extends within the interconnect layer, and a second ring structure including conductive material extends within the interconnect layer. In an example, the second ring structure is non-overlapping with the first ring structure. In an example, the first ring structure is above the first set of devices of the device layer, and the second ring structure is above the second set of devices of the device layer.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Applicant: Intel CorporationInventors: June Choi, Keith E. Zawadzki, Kimberly L. Pierce, Mohammad Enamul Kabir
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Publication number: 20240105589Abstract: An IC device includes a metal layer that includes staggered metal lines. The metal lines are in two or more levels along a direction. There may be one or more metal lines in each level. At least some of the metal lines are aligned along the direction so that widths of the metal lines may be maximized for a given total width of the metal layer. The alignment of the metal lines may be achieved through DSA of a diblock copolymer. The metal layer may be connected to vias in two or more levels. The vias may be also connected to another metal layer or a semiconductor device in a FEOL section of the IC device. A via and the metal line connected to the via may be formed through a same recess and deposition process to eliminate interface between the via and metal line.Type: ApplicationFiled: September 28, 2022Publication date: March 28, 2024Applicant: Intel CorporationInventors: Shao Ming Koh, Patrick Morrow, June Choi, Sukru Yemenicioglu, Nikhil Jasvant Mehta
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Publication number: 20240096785Abstract: An IC device includes a transistor, a first layer, and a second layer. The first layer is coupled to the transistors and is between the transistor and the second layer in a first direction. The first layer includes a first structure and a second structure. The first structure includes a first metal (e.g., Ru). The second structure includes a second metal (e.g., Cu). The second structure may be wrapped around by a different material that may include a third metal (e.g., Co). The first structure may be shorter than the second structure in the first direction and narrower than the second structure in a second direction orthogonal to the first direction. The first structure may be closer to the second layer than the second structure in the first direction. The first structure may be a wordline of a memory. The second structure may be a bitline.Type: ApplicationFiled: September 16, 2022Publication date: March 21, 2024Applicant: Intel CorporationInventors: June Choi, Charles Henry Wallace, Richard E. Schenker, Nikhil Jasvant Mehta
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Publication number: 20240071913Abstract: An integrated circuit structure includes a first interconnect layer, and a second interconnect layer above the first interconnect layer. The first interconnect layer includes a first interconnect feature and a second interconnect feature. The second interconnect layer includes a third interconnect feature, a fourth interconnect feature, and a fifth interconnection feature. The third interconnect feature extends from an upper surface of the first interconnect feature to an upper surface of the second interconnect layer. In an example, the fourth interconnect feature extends from an upper surface of the second interconnect feature to below the upper surface of the second interconnect layer, and the fifth interconnect feature extends from an upper surface of the fourth interconnect feature to the upper surface of the second interconnect layer. Thus, a double-decked vertical stack of interconnect features is formed using the fourth interconnect feature within the second interconnect layer.Type: ApplicationFiled: August 24, 2022Publication date: February 29, 2024Applicant: Intel CorporationInventors: June Choi, Richard Schenker, Charles H. Wallace, Nikhil J. Mehta, Clifford L. Ong
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Publication number: 20230420512Abstract: Integrated circuit structures having backside power staple are described. In an example, an integrated circuit structure includes a plurality of gate lines. A plurality of trench contacts is extending over a plurality of source or drain structures, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A front-side metal routing layer is extending over one or more of the plurality of gate lines, and over and coupled to one or more of the plurality of trench contacts. A backside metal routing layer is extending beneath the one or more of the plurality of gate lines and the one or more of the plurality of trench contacts, the backside metal routing layer parallel and overlapping with the front-side metal routing layer. A conductive feedthrough structure couples the backside metal routing layer to the front-side metal routing layer.Type: ApplicationFiled: June 27, 2022Publication date: December 28, 2023Inventors: Sukru YEMENICIOGLU, Xinning WANG, Nischal ARKALI RADHAKRISHNA, Leonard P. GULER, Mauro J. KOBRINSKY, June CHOI, Pratik PATEL, Tahir GHANI
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Publication number: 20230347555Abstract: A shaping apparatus for a pouch-shaped battery case includes a punch configured to press a laminate sheet in order to shape an electrode assembly receiving portion of the pouch-shaped battery case, a die in which an accommodation portion is formed having a size corresponding to the electrode assembly receiving portion, a holder configured to fix an outer periphery of the laminate sheet, and an electromagnetic field-generating means attached to the punch and configured to generate an electromagnetic field. A pouch-shaped battery case shaping process uses the shaping apparatus to manufacture the pouch-shaped battery case.Type: ApplicationFiled: October 13, 2021Publication date: November 2, 2023Applicant: LG Energy Solution, Ltd.Inventors: Ho June Chi, Hang June Choi, Jeong Oh Moon, Jin Yong Park