Abstract: Disclosed is a force sensor. More particularly, the force sensor includes a first permanent magnet layer; a magnetic tunnel junction disposed on the first permanent magnet layer and configured to have a preset resistance value; and a second permanent magnet layer disposed to be spaced apart from the magnetic tunnel junction, wherein the second permanent magnet layer moves in a direction of the first permanent magnet layer when pressure is applied from outside, the preset resistance value of the magnetic tunnel junction is changed when a magnetic field strength formed between the first permanent magnet layer and the second permanent magnet layer becomes a preset strength or more according to movement of the second permanent magnet layer, and the force sensor senses the pressure based on a change in the preset resistance value.

Abstract: Disclosed is a force sensor. More particularly, the force sensor includes a first permanent magnet layer; a magnetic tunnel junction disposed on the first permanent magnet layer and configured to have a preset resistance value; and a second permanent magnet layer disposed to be spaced apart from the magnetic tunnel junction, wherein the second permanent magnet layer moves in a direction of the first permanent magnet layer when pressure is applied from outside, the preset resistance value of the magnetic tunnel junction is changed when a magnetic field strength formed between the first permanent magnet layer and the second permanent magnet layer becomes a preset strength or more according to movement of the second permanent magnet layer, and the force sensor senses the pressure based on a change in the preset resistance value.

Abstract: The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.

Abstract: The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.

Abstract: The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.

Abstract: In one implementation, an electronic device is provided to include a semiconductor memory, wherein the semiconductor memory may include: a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction free layer, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer, and the electronic device may further include, in a first direction in which the free layer, the tunnel barrier layer and the pinned layer are arranged, a first permanent magnet having a first surface facing a first surface of the variable resistance element and spaced from the variable resistance element, wherein a magnetic field generated by the first permanent magnet may have a direction which offsets or reduces an influence of a stray field generated by the pinned layer.

Abstract: In one implementation, an electronic device is provided to include a semiconductor memory, wherein the semiconductor memory may include: a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a changeable magnetization direction free layer, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer, and the electronic device may further include, in a first direction in which the free layer, the tunnel barrier layer and the pinned layer are arranged, a first permanent magnet having a first surface facing a first surface of the variable resistance element and spaced from the variable resistance element, wherein a magnetic field generated by the first permanent magnet may have a direction which offsets or reduces an influence of a stray field generated by the pinned layer.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a pinned layer having a pinned magnetization direction; a free layer having a changeable magnetization direction; a tunnel barrier layer interposed between the pinned layer and the free layer, and including a metal oxide; and a carbon-based compound patch positioned at one or more of between the pinned layer and the tunnel barrier layer, between the free layer and the tunnel barrier layer, and in the tunnel barrier layer.

Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include free layer having a variable magnetization direction; a tunnel barrier layer formed over the free layer; a pinned layer formed over the tunnel barrier layer and having a pinned magnetization direction; an exchange coupling layer formed over the pinned layer; and a magnetic correction layer formed over the exchange coupling layer, wherein the magnetic correction layer comprises a first magnetic layer, a spacer layer and a second magnetic layer that are sequentially stacked, and the first magnetic layer has a saturation magnetization smaller than a saturation magnetization of the second magnetic layer.

Abstract: The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a pinned layer having a pinned magnetization direction; a free layer having a changeable magnetization direction; a tunnel barrier layer interposed between the pinned layer and the free layer, and including a metal oxide; and a carbon-based compound patch positioned at one or more of between the pinned layer and the tunnel barrier layer, between the free layer and the tunnel barrier layer, and in the tunnel barrier layer.

Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include free layer having a variable magnetization direction; a tunnel barrier layer formed over the free layer; a pinned layer formed over the tunnel barrier layer and having a pinned magnetization direction; an exchange coupling layer formed over the pinned layer; and a magnetic correction layer formed over the exchange coupling layer, wherein the magnetic correction layer comprises a first magnetic layer, a spacer layer and a second magnetic layer that are sequentially stacked, and the first magnetic layer has a saturation magnetization smaller than a saturation magnetization of the second magnetic layer.