Patents by Inventor June-Taeg Lee
June-Taeg Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10943939Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: GrantFiled: February 11, 2019Date of Patent: March 9, 2021Inventors: Byung-Jun Park, Chang-Rok Moon, Seung-Hun Shin, Seong-Ho Oh, Tae-Seok Oh, June-Taeg Lee
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Publication number: 20190189668Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: ApplicationFiled: February 11, 2019Publication date: June 20, 2019Inventors: BYUNG-JUN PARK, CHANG-ROK MOON, SEUNG-HUN SHIN, SEONG-HO OH, TAE-SEOK OH, JUNE-TAEG LEE
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Patent number: 10229949Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: GrantFiled: June 16, 2017Date of Patent: March 12, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-Jun Park, Chang-Rok Moon, Seung-Hun Shin, Seong-Ho Oh, Tae-Seok Oh, June-Taeg Lee
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Patent number: 10033974Abstract: An electronic device is provided. The electronic device includes a first inorganic color filter including a first surface on which light is incident and a second surface opposite the first surface; and a first organic color filter disposed on the first surface of the first inorganic color filter.Type: GrantFiled: July 13, 2015Date of Patent: July 24, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ha-Kyu Choi, Chang-Rok Moon, June-Taeg Lee, Hyung-Jun Kim
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Publication number: 20170287967Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: ApplicationFiled: June 16, 2017Publication date: October 5, 2017Inventors: BYUNG-JUN PARK, CHANG-ROK MOON, SEUNG-HUN SHIN, SEONG-HO OH, TAE-SEOK OH, JUNE-TAEG LEE
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Patent number: 9728572Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: GrantFiled: December 5, 2014Date of Patent: August 8, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-Jun Park, Chang-Rok Moon, Seung-Hun Shin, Seong-Ho Oh, Tae-Seok Oh, June-Taeg Lee
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Publication number: 20160365374Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.Type: ApplicationFiled: August 29, 2016Publication date: December 15, 2016Inventors: Byung-Jun PARK, Seung-Hun SHIN, Chang-Rok MOON, Tae-Seok OH, June-Taeg LEE
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Patent number: 9455284Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.Type: GrantFiled: January 22, 2015Date of Patent: September 27, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byung-Jun Park, Seung-Hun Shin, Chang-Rok Moon, Tae-Seok Oh, June-Taeg Lee
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Publication number: 20160065914Abstract: An electronic device is provided. The electronic device includes a first inorganic color filter including a first surface on which light is incident and a second surface opposite the first surface; and a first organic color filter disposed on the first surface of the first inorganic color filter.Type: ApplicationFiled: July 13, 2015Publication date: March 3, 2016Inventors: Ha-Kyu CHOI, Chang-Rok MOON, June-Taeg LEE, Hyung-Jun KIM
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Publication number: 20150311241Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.Type: ApplicationFiled: January 22, 2015Publication date: October 29, 2015Inventors: Byung-Jun PARK, Seung-Hun SHIN, Chang-Rok MOON, Tae-Seok OH, June-Taeg LEE
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Patent number: 9165974Abstract: An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.Type: GrantFiled: September 15, 2014Date of Patent: October 20, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-kwan Kim, Doo-won Kwon, Jeong-ki Kim, Wook-hwan Kim, Byung-jun Park, Seung-hun Shin, June-taeg Lee, Ha-kyu Choi, Tae-seok Oh
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Publication number: 20150287766Abstract: A unit pixel of an image sensor is provided. The unit pixel includes a visible light detection layer and an infrared light detection layer disposed on the visible light detection layer. The visible light detection layer includes visible light pixels and color filters configured to detect visible light to output first charges. The infrared light detection layer includes at least one infrared light pixel configured to detect infrared light to output second charges.Type: ApplicationFiled: April 1, 2015Publication date: October 8, 2015Inventors: Tae-Chan Kim, June-Taeg Lee, Dong-Ki Min, Sang-Chul Sul, Myung-Won Lee, Tae-Yon Lee, Jung-Kyu Jung
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Publication number: 20150221695Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.Type: ApplicationFiled: December 5, 2014Publication date: August 6, 2015Inventors: Byung-Jun Park, Chang-Rok Moon, Seung-Hun Shin, Seong-Ho Oh, Tae-Seok Oh, June-Taeg Lee
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Publication number: 20150076649Abstract: An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.Type: ApplicationFiled: September 15, 2014Publication date: March 19, 2015Inventors: Sung-kwan KIM, Doo-Won Kwon, Jeong-ki Kim, Wook-hwan Kim, Byung-jun Park, Seung-hun Shin, June-taeg Lee, Ha-kyu Choi, Tae-Seok Oh
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Publication number: 20150041944Abstract: Image sensor, fabricating method thereof, and device comprising the image sensor are provided, which comprises a substrate in which a photoelectric transformation device is formed, an interconnection structure formed on the substrate and including multiple intermetal dielectric layers and multiple metal interconnections placed in the multiple intermetal dielectric layers, the interconnection structure defining a cavity aligned corresponding to the photoelectric transformation device, a moisture absorption barrier layer conformally formed on a top of the interconnection structure and in the cavity; and a light guide unit formed on the moisture absorption barrier layer and including light transmittance material filling the cavity, wherein the moisture absorption barrier layer is formed with a uniform thickness on both sides and a bottom of the cavity and on a top surface of the multiple intermetal dielectric layer.Type: ApplicationFiled: September 8, 2014Publication date: February 12, 2015Inventors: Hong-ki KIM, Ho-Kyu KANG, June-taeg LEE, Jae-Hee CHOI
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Patent number: 8847297Abstract: Image sensor, fabricating method thereof, and device comprising the image sensor are provided, which comprises a substrate in which a photoelectric transformation device is formed, an interconnection structure formed on the substrate and including multiple intermetal dielectric layers and multiple metal interconnections placed in the multiple intermetal dielectric layers, the interconnection structure defining a cavity aligned corresponding to the photoelectric transformation device, a moisture absorption barrier layer conformally formed on a top of the interconnection structure and in the cavity; and a light guide unit formed on the moisture absorption barrier layer and including light transmittance material filling the cavity, wherein the moisture absorption barrier layer is formed with a uniform thickness on both sides and a bottom of the cavity and on a top surface of the multiple intermetal dielectric layer.Type: GrantFiled: December 23, 2010Date of Patent: September 30, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hong-Ki Kim, Ho-Kyu Kang, June-Taeg Lee, Jae-Hee Choi
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Patent number: 8482641Abstract: An image sensor includes an array of image sensor cells, on a substrate, and a peripheral circuit region extending adjacent the array of image sensor cells. The array of image sensor cells includes a plurality of lens elements and a plurality of color filters extending adjacent the plurality of lens elements. A plurality of photodiodes is provided in the substrate. The plurality of photodiodes are aligned to corresponding ones of the plurality of lens elements. An interconnection structure is also provided, which extends between the plurality of photodiodes and the plurality of color filters. The interconnection structure has an array of cavities therein that are aligned to corresponding ones of the plurality of photodiodes and are filled with a light guide material. The peripheral circuit region includes a metal interconnect pattern and an electrically conductive pad on the metal interconnect pattern. An electrically insulating layer extends on the electrically conductive pad.Type: GrantFiled: December 9, 2010Date of Patent: July 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Hyun Cho, June-Taeg Lee, Sun-Wook Heo, Kee-Moon Chun
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Patent number: 8334554Abstract: An image sensor includes a first region of a substrate having photoelectric conversion elements formed therein, and includes a second region of the substrate outside of the first region. The image sensor includes a plurality of lenses, a plurality of embossing structures, and a protective layer. The lenses are formed over the first region. The embossing structures are formed over the second region, and the embossing structures are separated from each-other. The protective layer is formed over the lenses and the embossing structures that prevent crack propagation.Type: GrantFiled: March 4, 2009Date of Patent: December 18, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Kwan Kim, June-Taeg Lee, Jeong-Wook Ko, Jung-Saeng Kim
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Patent number: 8119437Abstract: The method of manufacturing an image sensor includes providing a semiconductor substrate including a first pixel region, first forming a first pattern on the first pixel region, first performing a reflow of the first pattern to form a sub-micro lens on the first pixel region, second forming a second pattern on the sub-micro lens, and second performing a reflow of the second pattern to form a first micro lens covering the sub-micro lens.Type: GrantFiled: June 30, 2009Date of Patent: February 21, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Saeng Kim, June-Taeg Lee, Sung-Kwan Kim, Jeong-Wook Ko
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Publication number: 20110176022Abstract: An image sensor includes an array of image sensor cells, on a substrate, and a peripheral circuit region extending adjacent the array of image sensor cells. The array of image sensor cells includes a plurality of lens elements and a plurality of color filters extending adjacent the plurality of lens elements. A plurality of photodiodes is provided in the substrate. The plurality of photodiodes are aligned to corresponding ones of the plurality of lens elements. An interconnection structure is also provided, which extends between the plurality of photodiodes and the plurality of color filters. The interconnection structure has an array of cavities therein that are aligned to corresponding ones of the plurality of photodiodes and are filled with a light guide material. The peripheral circuit region includes a metal interconnect pattern and an electrically conductive pad on the metal interconnect pattern. An electrically insulating layer extends on the electrically conductive pad.Type: ApplicationFiled: December 9, 2010Publication date: July 21, 2011Inventors: Jung-Hyun Cho, June-Taeg Lee, Sun-Wook Heo, Kee-Moon Chun