Patents by Inventor Junfei Yu

Junfei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11532936
    Abstract: Embodiments of an ESD protection device are described. In an embodiment, an ESD protection device includes a first voltage rail electrically connected to a first node, a second voltage rail electrically connected to a second node, and ESD cells connected between the first and second voltage rails and configured to shunt current in response to an ESD pulse received between the first and second nodes. Each of the ESD cells includes clamp circuits electrically connected to the second voltage rail, ballast resistors connected between the first voltage rail and the clamp circuits, where at least some of the ballast resistors are electrically connected to a third voltage rail, a driver circuit connected between the second and third voltage rails and configured to generate a driver signal, and an output stage configured to generate an output signal in response to the driver signal.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 20, 2022
    Assignee: NXP B.V.
    Inventors: Gijs Jan de Raad, Junfei Yu, Rongrong Tang, Haojing Wu
  • Publication number: 20220209527
    Abstract: Embodiments of an ESD protection device are described. In an embodiment, an ESD protection device includes a first voltage rail electrically connected to a first node, a second voltage rail electrically connected to a second node, and ESD cells connected between the first and second voltage rails and configured to shunt current in response to an ESD pulse received between the first and second nodes. Each of the ESD cells includes clamp circuits electrically connected to the second voltage rail, ballast resistors connected between the first voltage rail and the clamp circuits, where at least some of the ballast resistors are electrically connected to a third voltage rail, a driver circuit connected between the second and third voltage rails and configured to generate a driver signal, and an output stage configured to generate an output signal in response to the driver signal.
    Type: Application
    Filed: May 27, 2021
    Publication date: June 30, 2022
    Inventors: Gijs Jan de Raad, Junfei Yu, Rongrong Tang, Haojing Wu