Abstract: Embodiments of integrated circuit (IC) assemblies and related techniques are disclosed herein. For example, in some embodiments, an IC assembly may include a first printed circuit board (PCB) having a first face and an opposing second face; a die electrically coupled to the first face of the first PCB; a second PCB having a first face and an opposing second face, wherein the second face of the second PCB is coupled to the first face of the first PCB via one or more solder joints; and a molding compound. The molding compound may be in contact with the first face of the first PCB and the second face of the second PCB. Other embodiments may be disclosed and/or claimed.

Abstract: A circuit, where a first end of a resistive random access memory (RRAM) included in the circuit includes a first end of the circuit, and a second end of the RRAM is coupled to a first end of a first switch and a first end of a second switch, a second end of the first switch includes a second end of the circuit, and a first control end of the first switch and a second control end of the second switch are configured to make the first switch closed and the second switch open at the same time. Therefore, a working status of the RRAM is flexibly controlled.

Abstract: A method for generating energy-optimized travel routes with a vehicle navigation system includes generating candidate travel routes between a route origin and one or more route destinations, and then dividing each candidate travel route into a plurality of route segments. The method includes estimating expected travel speeds along each segment using cloud information and calculating an expected energy efficiency over each of the candidate travel routes using one or more vehicle-specific energy efficiency models. The travel routes are displayed via the navigation system, including a trace of the energy-optimized travel routes and an expected or relative energy efficiency along the energy-optimized travel routes. A vehicle includes the navigation system and a powertrain. A powertrain controller may control vehicle speed over a selected route to maintain an optimally energy-efficient speed.

Abstract: A vehicle engine system includes a combustion engine configured to provide a propulsion torque to satisfy a propulsion demand in response to a driver input. The engine system also includes a controller programmed to receive data indicative of at least one upcoming driving event, and issue a command to impart a predetermined velocity profile based on the upcoming driving event. The predetermined velocity profile is arranged to optimize a performance attribute of the combustion engine and preempt the driver input.

Abstract: A data storage method applying to the phase change memory and a phase change memory are provided. After obtaining to-be-stored data, the phase change memory generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal is a signal including at least two consecutive pulses with a same amplitude. The amplitude of the at least two consecutive pulses is a value determined according to the to-be-stored data. Then, the phase change memory applies the erase pulse signal to a storage unit of the phase change memory to allow the storage unit to switch to a crystalline state. Further, the write pulse signal is applied to the storage unit to allow the storage unit to switch to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.

Abstract: A method for making a semiconductor device includes forming rims on first and second dice. The rims extend laterally away from the first and second dice. The second die is stacked over the first die, and one or more vias are drilled through the rims after stacking. The semiconductor device includes redistribution layers extending over at least one of the respective first and second dice and the corresponding rims. The one or more vias extend through the corresponding rims, and the one or more vias are in communication with the first and second dice through the rims.

Abstract: An image recognition accelerator, a terminal device, and an image recognition method are provided. The image recognition accelerator includes a dimensionality-reduction processing module, an NVM, and an image matching module. The dimensionality-reduction processing module first reduces a dimensionality of first image data. The NVM writes, into a first storage area of the NVM according to a specified first current I, ? low-order bits of each numeric value of the first image data on which dimensionality reduction has been performed, and writes, into a second storage area of the NVM according to a specified second current, (N??) high-order bits of each numeric value of the first image data on which dimensionality reduction has been performed. The image matching module determines whether an image library stored in the NVM includes image data matching the first image data on which dimensionality reduction has been performed.

Abstract: A magnetic storage apparatus is disclosed, and is configured to access data. The magnetic storage apparatus includes a magnetic storage track, a first write apparatus, a second write apparatus, and a drive apparatus. The first write apparatus and the second write apparatus are located at different positions on the magnetic storage track. The first write apparatus is configured to write first data “0” or second data “1”. The second write apparatus is configured to write third data “2” and fourth data “3”.

Abstract: A positioning method based on a visible light source, a mobile terminal, and a controller. The method includes acquiring, by a visible light source controller, geographical position attribute information of a position at which a visible light source array is located, determining, by the visible light source controller according to a preset correspondence between geographical position attribute information of a position at which a visible light source array is located and a visible light source array pattern, a visible light source array pattern corresponding to the acquired geographical position attribute information, and controlling, by the visible light source controller according to the determined visible light source array pattern, the luminance state of each visible light source included in the visible light source array. Hence the method reduces the complexity of a positioning process.

Abstract: A memory access method, a storage-class memory, and a computer system are provided. The computer system includes a memory controller and a hybrid memory, and the hybrid memory includes a dynamic random access memory (DRAM) and a storage-class memory (SCM). The memory controller sends a first access instruction to the DRAM and the SCM. When determining that a first memory cell set that is of the DRAM and to which a first address in the received first access instruction points includes a memory cell whose retention time is shorter than a refresh cycle of the DRAM, the SCM may obtain a second address having a mapping relationship with the first address. Further, the SCM converts, according to the second address, the first access instruction into a second access instruction for accessing the SCM, to implement access to the SCM.

Abstract: Embodiments of the present disclosure are directed towards an integrated circuit (IC) package. In embodiments, an integrated circuit (IC) package may include a flexible substrate. The flexible substrate may have a plurality of dies coupled therewith. The IC package may include a first encapsulation material, having a first rigidity, disposed on the flexible substrate to at least partially encapsulate each die of the plurality dies. The IC package may further include a second encapsulation material, having a second rigidity, disposed on the flexible substrate. In embodiments, the second rigidity and the first rigidity are different from one another. Other embodiments may be described and/or claimed.

Abstract: Some forms relate to an electronic assembly (10) that includes a die (11) that includes an upper surface (12) and a conductive column (13) extending from the upper surface (12) such that the conductive column (13) is not surrounded by any material other than where the conductive column (13) engages the die (11). Other forms relate to an electronic package (19) that includes a stack (20) of electronic assemblies (10) where each electronic assembly (10) includes a die (11) that having an upper surface (12) and a plurality of conductive columns (13) extending from the upper surface (12) such that each conductive column (13) is not surrounded by any material other than where the conductive column (13) engages the die (11), and wherein the stack (20) of electronic assemblies (10) is arranged in an overlapping configuration such the plurality of conductive columns (13) on each electronic assembly (10) are not covered by another electronic assembly (10).

Abstract: A logical operation array of a resistive random access memory includes at least one logical operation unit; each logical operation unit includes multiple resistive random access memories, multiple field effect transistor switches and a voltage converter.

Abstract: A first memory access request is obtained, where the first memory access request is used to request to access a first sub-row in a memory. A to-be-scheduled queue of the memory is searched for a second memory access request, where the to-be-scheduled queue of the memory includes multiple memory access requests, the second memory access request is used to request to access a second sub-row in the memory. The first sub-row and the second sub-row are located in a same row in the memory. The first memory access request and the second memory access request are combined to generate a first activation instruction, where the first activation instruction is used to instruct to activate the first sub-row and the second sub-row in the memory. The first activation instruction is sent to the memory.

Abstract: A storage unit includes a U-shaped magnetic track, a first drive circuit, a second drive circuit, a first drive port, and a second drive port. The U-shaped magnetic track includes a first port, a second port, a first storage area, and a second storage area. By controlling input voltages of the first port, the second port, the first drive port, and the second drive port and driving the first drive circuit, a current pulse is generated in the first storage area, and a magnetic domain wall in the first storage area is driven to move. By controlling the input voltages of the first port, the second port, the first drive port, and the second drive port and driving the second drive circuit, a current pulse is generated in the second storage area, and a magnetic domain in the second storage area is driven to move.

Abstract: A write apparatus and a magnetic memory, where the write apparatus includes a first drive port, a second drive port, a first information storage area, a second information storage area, and an information buffer. A first area locates between the first information storage area and the information buffer. A second area locates between the second information storage area and the information buffer. The first information storage area, the second information storage area, and the information buffer are made of a first magnetic material. The first area and the second area are made of a second magnetic material. Magnetic energy of the first magnetic material is higher than magnetic energy of the second magnetic material. The write apparatus can ensure write stability of the magnetic memory.

Abstract: A circuit and an array circuit for implementing a shift operation are provided. The circuit for implementing a shift operation includes a resistive random-access memory and four switches. The circuit has a simple structure and can improve computational efficiency.

Abstract: A method for making a semiconductor device includes forming rims on first and second dice. The rims extend laterally away from the first and second dice. The second die is stacked over the first die, and one or more vias are drilled through the rims after stacking. The semiconductor device includes redistribution layers extending over at least one of the respective first and second dice and the corresponding rims. The one or more vias extend through the corresponding rims, and the one or more vias are in communication with the first and second dice through the rims.

Abstract: A file management method, a distributed storage system, and a management node are disclosed. In the distributed storage system, after receiving a file creation request sent by a host for requesting to create a file in a distributed storage system, a management node allocates, to the file, first virtual space from global virtual address space of the distributed storage system, where local virtual address space of each storage node in the distributed storage system is corresponding to a part of the global virtual address space. Then, the management node records metadata of the file, where the metadata of the file includes information about the first virtual space, and the information about the first virtual space is used to point to local virtual address space of a storage node that is used to store the file. Further, the management node sends, the information about the first virtual space to the host.

Abstract: An information storage apparatus includes a magnetic track, a writer, and a reader, where the magnetic track includes a number of magnetic domains. Each magnetic domain is divided into at least two magnetic regions, and the writer is disposed on the magnetic track, and configured to write information to the at least two magnetic regions of each magnetic domain. The reader, disposed on the magnetic track, is configured to read the written information from the at least two magnetic regions. Therefore, multiple pieces of valid information are written to one magnetic domain of the magnetic track, thereby increasing storage density of the magnetic track, and expanding a storage capacity of the storage apparatus.