Patents by Inventor Jung Chang
Jung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12388030Abstract: A method of manufacturing a semiconductor device is provided. The method includes placing a package substrate on a carrier substrate, forming a frame on the package substrate, and affixing an active side of a semiconductor die on the package substrate. The semiconductor die together with the frame and the package substrate form a cavity between the semiconductor die and the package substrate. At least a portion of the semiconductor die and the package substrate are encapsulated with an encapsulant. The frame is configured to prevent the encapsulant from entering the cavity.Type: GrantFiled: July 28, 2022Date of Patent: August 12, 2025Assignee: NXP B.V.Inventors: Tzu Ya Fang, Yen-Chih Lin, Jian Nian Chen, Moly Lee, Yi Xiu Xie, Vanessa Wyn Jean Tan, Yao Jung Chang, Yi-Hsuan Tsai, Xiu Hong Shen, Kuan Lin Huang
-
Publication number: 20250244527Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes an optical interposer having optical waveguides; a plurality of chip stacks disposed over the optical interposer, each of the plurality of chip stacks including a first photonic IC chip and a memory chip over the first photonic IC chip; and a plurality of first laser source chips disposed adjacent to the plurality of chip stacks, respectively, wherein the optical waveguides in the optical interposer are configured as an optical interconnect structure to couple with the memory chip through the first photonic IC chip.Type: ApplicationFiled: April 30, 2024Publication date: July 31, 2025Inventors: Tso-Jung Chang, Chih-Peng Lin, Jeng-Shien Hsieh, Chieh-Yen Chen, Hung-Yi Kuo, Han-Jong Chia
-
Publication number: 20250233164Abstract: Provided are an air electrode composite, a method of manufacturing the same, and an electrochemical cell including the same. Specifically, an air electrode composite in which electron conductive nanoparticles are uniformly distributed on the surface of an oxygen ion conductive porous structure, a method of manufacturing the same, and an electrochemical cell including the same are provided.Type: ApplicationFiled: March 26, 2024Publication date: July 17, 2025Inventors: Kyung Joong YOON, Hye Jung Chang, Mi Young Park, Sun-Young Park, Ha Neul Choi
-
Patent number: 12358729Abstract: A system and method for rail management of an overhead transport (“OHT”) system of an associated automated material handing system (“AMHS”) that includes a controller in communication with the OHT system, including vehicles traveling on rails of the OHT. The rail management system also includes a turntable located on a portion of the OHT and equipped with a set of fixed rails. Upon receipt of a request to rotate the turntable from a first run-through direction to a second run-through direction, the controller engages at least one stopper sensor located near the turntable. The controller then directs the turntable to rotate from the first run-through direction to the second run-through direction. After completion, the controller disengages the at least one stopper to enable vehicles to travel directly in the second run-through direction.Type: GrantFiled: September 24, 2021Date of Patent: July 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guancyun Li, Ching-Jung Chang
-
Patent number: 12360465Abstract: A method includes: storing a carrier containing material in a storage; recording environmental data of the storage to a database while the material is in the storage; generating a forecast for the material in the carrier based on the environmental data; receiving a request for the material from a semiconductor fabrication tool; and providing the carrier to the semiconductor fabrication tool based on the forecast.Type: GrantFiled: June 27, 2023Date of Patent: July 15, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Rong-Syuan Fan, Chi-Feng Tung, Ching-Jung Chang, Hsiang-Yin Shen
-
Publication number: 20250223114Abstract: An overhead transport system is provided capable of absorbing abnormal vibration and determining a source of the abnormal vibration. The overhead transport system in accordance with various embodiments of the present disclosure includes a processor, an overhead rail, a plurality of hangers that support the overhead rail, a vibration meter measuring vibration from the overhead rail, and a damper included in each of the hangers. The processor is configured to change a property of the damper in response to a determination that the measured vibration by the vibration meter is indicative of an abnormal vibration.Type: ApplicationFiled: March 27, 2025Publication date: July 10, 2025Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chieh HSU, Guancyun LI, Ching-Jung CHANG, Chi-Feng TUNG, Hsiang-Yin SHEN
-
Patent number: 12353079Abstract: A display device includes a backboard, a rubber frame and a display panel. A backboard includes a base and a wall having a first end and a second end opposite to the first end. The first end connects with an edge of the base. The rubber frame includes an abutting portion, a supporting portion and an extending portion. The abutting portion locates outside the backboard and abuts against the wall. The supporting portion connects with the abutting portion and is supported at the second end. The extending portion connects with the abutting portion and extends toward outside from the backboard. The extending portion and the supporting portion are at least partially coplanar to define a connecting surface. The display panel couples with the connecting surface. An edge of the extending portion substantially aligns with or exceeds relative to the wall an edge of the display panel.Type: GrantFiled: April 9, 2023Date of Patent: July 8, 2025Assignee: AmTRAN Technology Co., Ltd.Inventors: Chih Kuei Wang, Chih Chien Hung, Yung Hsu Chen, Hsuan-Jung Chang
-
Publication number: 20250218154Abstract: A clothing design similarity determination system and method are provided. The clothing design similarity determination method includes: a first step (S100) of collecting image data about clothing using a device (1); a second step (S110) of removing unnecessary parts from the collected image data using a pre-processing unit; a third step (S120) of image-processing features of the clothing by calculating an extracted target image using a feature calculation unit (9); a fourth step (S130) of storing the data of the first, second, and third steps (S100, S110, S120) in a database (13); and a fifth step (S140) of calculating similarity of clothing design using artificial intelligence. This work was supported by project for Smart Manufacturing Innovation R&D funded Korea Ministry of SMEs and Startups in 2023. (Project No.Type: ApplicationFiled: December 29, 2023Publication date: July 3, 2025Applicant: D3D Co., Ltd.Inventors: Ji-Tae Ha, Eun-mi OH, Hyo-Jung Chang, Jo-Woon Chong
-
Publication number: 20250209248Abstract: Boundary cells may be provided. A boundary of a first functional cell of a circuit is determined. A first plurality of a first type of dummy cells are placed along a first portion of the determined boundary. The first portion extends in a first direction. Each of the first type of dummy cells comprises first pre-defined dimensions. A second plurality of a second type of dummy cells are placed along a second portion of the determined boundary. The second portion extends in a second direction. Each of the second type of dummy cells comprises second pre-defined dimensions. The second pre- defined dimensions is different than the first pre-defined dimensions.Type: ApplicationFiled: March 11, 2025Publication date: June 26, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Jung Chang, Min-Yuan Tsai, Wen-Ju Yang
-
Patent number: 12341103Abstract: An integrated circuit includes a first and second active region, a first conductive structure, an insulating region, a set of gates and a set of contacts. The first and second active region are in a substrate, extend in a first direction, are located on a first level, and being separated from one another in a second direction. The first conductive structure extends in the first direction, is located on the first level, and is between the first and second active region. The insulating region is located on at least the first level, and is between the first and second active region and the first conductive structure. The set of gates extend in the second direction, overlap the first conductive structure, and is located on a second level. The set of contacts extend in the second direction, overlap the first conductive structure, and is located on the second level.Type: GrantFiled: November 7, 2022Date of Patent: June 24, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Hui-Zhong Zhuang, Jung-Chan Yang, Ru-Gun Liu, Ya-Chi Chou, Yi-Hsiung Lin, Yu-Xuan Huang, Yu-Jung Chang, Guo-Huei Wu, Shih-Ming Chang
-
Patent number: 12334929Abstract: Circuits and methods are provided for an input hysteresis buffer that includes a voltage limiting unit, a voltage detecting unit connected to the voltage limiting unit, and a supply tracking bias unit connected to the voltage detecting unit. The voltage liming unit comprises a first voltage limiting unit and a second voltage limiting unit. The voltage detecting unit comprises a first voltage detecting unit configured to detect the presence of a first threshold voltage in an input signal, and a second voltage detecting unit configured to detect the presence of a second threshold voltage in the input signal. The supply tracking bias unit is configured to supply a control signal to the voltage detecting unit.Type: GrantFiled: April 18, 2023Date of Patent: June 17, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Wei Kuo, Chia-Jung Chang, Yu-Kai Tsai
-
Publication number: 20250192673Abstract: A switching regulator includes: a power stage circuit configured to operably control a power switch therein according to a pulse width modulation signal to switch an inductor coupled to a phase node, so as to convert an input voltage to an output voltage; and a control circuit configured to operably determine an equivalent capacitance adjustment procedure to enter or sustain an enabled state according to a phase node voltage at the phase node at an inductor magnetization start time point in a discontinuous conduction mode (DCM) to adjust an equivalent capacitance at the phase node, so as to reduce a voltage across the power switch at another inductor magnetization start time point after the equivalent capacitance adjustment procedure.Type: ApplicationFiled: April 29, 2024Publication date: June 12, 2025Inventors: Chia-Jung Chang, Yu-Pin Tseng
-
Publication number: 20250183078Abstract: A method of transporting a first carrier is provided. The method includes responsive to a processing station being scheduled to receive a semiconductor wafer that is carried by the first carrier, moving a first transport vehicle from a first track to a second track via a first junction while the first carrier is supported by a first carrier support component of the first transport vehicle. The method includes transferring the first carrier from the first carrier support component to the buffer support component while the first transport vehicle is engaged with the second track. The method includes responsive to the processing station being available to receive the semiconductor wafer, transferring the first carrier from the buffer support component to a second carrier support component of the second transport vehicle. The method includes transferring the first carrier from the second carrier support component to the processing station.Type: ApplicationFiled: November 30, 2023Publication date: June 5, 2025Inventors: Yu-Zhu LIN, Chieh HSU, Guancyun LI, Ching-Jung CHANG
-
Publication number: 20250181301Abstract: A display system and a display method are provided. The display system includes a display apparatus and a mobile device having a computing device and a display. The method includes: selecting a first presentation file from at least one presentation file according to a first user command and obtaining a first slide and first speaker notes corresponding to the first slide from the first presentation file by the computing device of the mobile device, wherein the display apparatus is for displaying the first slide and the display is for displaying a floating window and the first slide, and the floating window at least partially covers the first slide displayed on the display, wherein the floating window is for displaying the first speaker notes.Type: ApplicationFiled: October 29, 2024Publication date: June 5, 2025Applicant: Optoma CorporationInventor: Jung-Chang Lin
-
Publication number: 20250181302Abstract: A display system and a displaying method are disclosed. The method includes: selecting a first presentation file from at least one presentation file by the first computing device of the first mobile device according to a first user command, obtaining a first slide and first speaker notes corresponding to the first slide from the first presentation file, and transmitting the first slide and the first speaker notes to the display apparatus; forwarding the first speaker notes by the display apparatus to the second computing device of the second mobile device; and displaying the first slide by the first display device of the first mobile device, displaying the first slide by the display apparatus, and displaying the first speaker notes by the second display device of the second mobile device.Type: ApplicationFiled: October 29, 2024Publication date: June 5, 2025Applicant: Optoma CorporationInventor: Jung-Chang Lin
-
Publication number: 20250167543Abstract: An integrated circuit that may withstand electrical over stress (EOS) is provided. The integrated circuit includes a core circuit, a connecting pad, a high-pass filter (HPF), an electrostatic discharge (ESD) protection circuit and an ESD enhanced-protection circuit. A first terminal of the HPF is coupled to the connecting pad. The ESD protection circuit is coupled to the connecting pad and the first terminal of the HPF. A first terminal of the ESD enhanced-protection circuit is coupled to a second terminal of the HPF. A second terminal of the ESD enhanced-protection circuit is coupled to a signal terminal of the core circuit.Type: ApplicationFiled: May 22, 2024Publication date: May 22, 2025Applicant: VIA LABS, INC.Inventors: Jung-Chang Liu, Chia Wei Chang
-
Publication number: 20250157862Abstract: A semiconductor device having an integrated lid structure is provided. The method includes mounting a semiconductor die within a cavity of a lid structure. An active side of the semiconductor die is substantially coplanar with a bottom surface of the lid structure. An encapsulant substantially fills a gap region between sidewalls of the semiconductor die and inner sidewall surfaces of the cavity.Type: ApplicationFiled: November 15, 2023Publication date: May 15, 2025Inventors: Yu Ling Tsai, Yen-Chih Lin, Yi-Hsuan Tsai, Yao Jung Chang
-
Patent number: 12298664Abstract: A method and a system for inspecting an extreme ultra violet mask and a mask pod for such masks is provided. An EUV mask inspection tool inspects a mask retrieved from a mask pod placed on the load port positioned exterior of the mask inspection tool. The inspection process is performed during a selected period of time. After the inspection process is initiated, a robotic handling mechanism such as a robotic arm or an AMHS picks up the mask pod and inspects the mask pod for foreign particles. A mask pod inspection tool determines whether the mask pod needs cleaning or replacing based on a selected swap criteria. The mask pod is retrieved from the mask pod inspection tool and placed on the load port before the selected period of time lapses. This method and system promotes a reduction in the overall time required for inspecting the mask and the mask pod.Type: GrantFiled: January 31, 2024Date of Patent: May 13, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tung-Jung Chang, Jen-Yang Chung, Han-Lung Chang
-
Patent number: 12300692Abstract: An electro-static discharge (ESD) protection network for an input/output (I/O) pad includes a driver stack including an upper branch and a lower branch, the upper branch being electrically connected between a first node that has a first reference voltage and the I/O pad, and the lower branch being electrically connected between the I/O pad and a second node that has a second reference voltage; a first ESD device electrically connected between the I/O pad and a third node that has a third reference voltage; and a power clamp between the third node and the second node.Type: GrantFiled: May 2, 2022Date of Patent: May 13, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Hui Chen, Chia-Jung Chang, Bo-Ting Chen
-
Patent number: 12301219Abstract: Systems and methods are provided for an electronic device that comprises a core logic circuit coupled to a supply voltage rail and an operating voltage rail. During a standard operation, the supply voltage rail has a supply voltage, the operating voltage rail has an operating voltage, and a post driver voltage rail has an overdrive voltage that is greater than the operating voltage. The electronic device further comprises a first power clamp circuit coupled to the supply voltage rail and the post driver voltage rail, a low-side logic-high voltage rail coupled to the first end of the core logic circuit, and a first power-to-power clamp circuit coupled to the low-side logic-high voltage rail and the post driver voltage rail. The first power-to-power clamp circuit is configured to receive electrostatic discharge (ESD) current between the post driver voltage rail and the low-side logic-high voltage rail.Type: GrantFiled: August 7, 2023Date of Patent: May 13, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Hui Chen, Yu-Kai Tsai, Chia-Jung Chang