Patents by Inventor Jung-Chang Chiang

Jung-Chang Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170556
    Abstract: A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.
    Type: Application
    Filed: February 20, 2023
    Publication date: May 23, 2024
    Inventors: Shih-Cheng CHEN, Zhi-Chang LIN, Jung-Hung CHANG, Chien-Ning YAO, Tsung-Han CHUANG, Kuo-Cheng CHIANG
  • Publication number: 20240170337
    Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Zhi-Chang LIN, Shih-Cheng CHEN, Kuo-Cheng CHIANG, Kuan-Ting PAN, Jung-Hung CHANG, Lo-Heng CHANG, Chien Ning YAO
  • Patent number: 11983479
    Abstract: A method of fabricating an integrated circuit includes placing a first set of conductive feature patterns on a first level, placing a second set of conductive feature patterns on a second level, placing a first set of via patterns between the second set of conductive feature patterns and the first set of conductive feature patterns, placing a third set of conductive feature patterns on a third level different from the first level and the second level, placing a second set of via patterns between the third set of conductive feature patterns and the second set of conductive feature patterns, and manufacturing the integrated circuit based on at least one of the above patterns of the integrated circuit.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Li-Chun Tien, Meng-Hung Shen, Shang-Chih Hsieh, Chi-Yu Lu
  • Patent number: 11967594
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo Heng Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20240096895
    Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
  • Patent number: 11929287
    Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zhi-Chang Lin, Shih-Cheng Chen, Kuo-Cheng Chiang, Kuan-Ting Pan, Jung-Hung Chang, Lo-Heng Chang, Chien Ning Yao
  • Patent number: 11916122
    Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zhi-Chang Lin, Kuan-Ting Pan, Shih-Cheng Chen, Jung-Hung Chang, Lo-Heng Chang, Chien-Ning Yao, Kuo-Cheng Chiang
  • Patent number: 7234887
    Abstract: A coupling device for an artificial model includes a male joining part, a female joining part and an insertion member. The male and female joining parts have a base disk attached with a front positioning plate and a rear lock plate respectively. The insertion member further includes an insert head, an adjustable bolt, a first elastic body, a cap, a pin, a ball, a second elastic body and a setscrew. The insertion member is inserted into the male and female joining parts such that the male joining part can open any angles with respect to the female joining part smoothly.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: June 26, 2007
    Inventor: Jung-Chang Chiang
  • Publication number: 20050105965
    Abstract: A coupling device for an artificial model includes a male joining part and a female joining part, which is joined to the male joining part tightly. The male joining part has the front positioning plate thereof providing a central circular protrusion, the insertion member thereof is composed of an insert head, a pin, an adjustment bolt, an elastic body and a covering cap with the insert head having a conical shape and an elongated flat part at the bottom thereof with the pin being inserted into the insert head along a radial direction of the insert head and passing through an axis of the insert head to form a shape of cross, and a hollow center thereof has a shape corresponding to the elongated flat part of the insert head such that the elongated flat part of the insert head can fit with the hollow center after being inserted into the hollow center with the adjustment bolt passing through the cap and the elastic body before engaging with the bottom of insert head.
    Type: Application
    Filed: November 13, 2003
    Publication date: May 19, 2005
    Inventor: Jung-Chang Chiang
  • Publication number: 20040141805
    Abstract: A waist connection apparatus for an artificial model comprises an upper and a lower bases respectively, and an upper and a lower engaging disks respectively. The upper and the lower engaging disks are fastened to the upper and the lower bases respectively. The upper and the lower disks provide detachable connecting parts such that the upper and the lower parts of the model can be joined together or separated apart easily. Hence, the waist connection apparatus makes the model possible to be hung up, lean to one side, and many other postures as desired by the need of exhibition. Furthermore, the waist connection apparatus can fit any size of the model as soon as a proper sized waist connection apparatus is replaced.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 22, 2004
    Inventor: Jung-Chang Chiang
  • Patent number: 6619875
    Abstract: A connection apparatus for an artificial model includes a resilient device and a post device. The resilient device has a hollow shaft extending upward from the fixing disk thereof to fit with a sleeve disposed outside the hollow shaft. A plurality of balls are attached to the hollow shaft and retained between the hollow shaft and the sleeve. The post device further includes a flange and an upright post. The upright post is inserted into the hollow shaft with the round top thereof passing over the balls such that the resilient device can join with the post device. Once the push lever is pushed with the slant parts thereof pressing the sleeve to slide the fixing disk forward, the annular projection section of the sleeve may slide away the balls to release the balls from the recess ring on the push rod such that the post is taken out from the hollow shaft to disengage the post device from the resilient device.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: September 16, 2003
    Inventor: Jung-Chang Chiang
  • Publication number: 20020197099
    Abstract: A waist connection apparatus for an artificial model comprises an upper and a lower bases respectively, and an upper and a lower engaging disks respectively. The upper and the lower engaging disks are fastened to the upper and the lower bases respectively. The upper and the lower disks provide detachable connecting parts such that the upper and the lower parts of the model can be joined together or separated apart easily. Hence, the waist connection apparatus makes the model possible to be hung up, lean to one side, and many other postures as desired by the need of exhibition. Furthermore, the waist connection apparatus can fit any size of the model as soon as a proper sized waist connection apparatus is replaced.
    Type: Application
    Filed: June 25, 2001
    Publication date: December 26, 2002
    Inventor: Jung-Chang Chiang
  • Publication number: 20020197100
    Abstract: An arm connection apparatus for an artificial model comprises two flat bases, a lock disk, a lock bolt, and a fixing disk. Each base has a recess hole with a contour composed of circular arc parts to join with a lock hole of the lock disk and a polygon lock part on the lock bolt such that an arm of the artificial model can be detachably connected to a shoulder part thereof easily and firmly. Next, the arm can be arranged to connect with the shoulder part in different positions by way of a changeable engagement between the lock hole and the polygon lock part. Moreover, it is possible to adjust the orientation of the lock hole by way of changing the angular position of the lock disk during being attached to the base to make the arm be a point of load while the model is hung up.
    Type: Application
    Filed: June 25, 2001
    Publication date: December 26, 2002
    Inventor: Jung-Chang Chiang
  • Publication number: 20020197105
    Abstract: A connection apparatus for an artificial model comprises a resilient device; and a post device. The resilient device further comprises a fixing disk, a hollow shaft, a sleeve, a plurality of balls, an elastic element, an upper cover, and a push lever. The hollow shaft extends upright from the fixing disk, and the sleeve fits with the hollow shaft in a way of being disposed outside the hollow shaft. The balls are inserted into pierced apertures on the hollow shaft respectively and are retained between the hollow shaft and an annular projection of the sleeve. The elastic element is disposed in the sleeve and urges the hollow shaft to fit with the sleeve with an aid of the balls. The push lever is disposed between the sleeve and the upper cover to be adjusted by a bolt at an end of the push lever. The post device further comprises a flange and an upright post.
    Type: Application
    Filed: June 25, 2001
    Publication date: December 26, 2002
    Inventor: Jung-Chang Chiang
  • Patent number: 6485215
    Abstract: An arm connection apparatus for an artificial model comprises two flat bases, a lock disk, a lock bolt, and a fixing disk. Each base has a recess hole with a contour composed of circular arc parts to join with a lock hole of the lock disk and a polygon lock part on the lock bolt such that an arm of the artificial model can be detachably connected to a shoulder part thereof easily and firmly. Next, the arm can be arranged to connect with the shoulder part in different positions by way of a changeable engagement between the lock hole and the polygon lock part. Moreover, it is possible to adjust the orientation of the lock hole by way of changing the angular position of the lock disk during being attached to the base to make the arm be a point of load while the model is hung up.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: November 26, 2002
    Inventor: Jung-Chang Chiang