Abstract: A semiconductor device includes first channel members, a first gate structure wrapping around each of the first channel members, a first epitaxial feature abutting the first channel members, second channel members, a second gate structure wrapping around each of the second channel members, a second epitaxial feature abutting the second channel members, and an isolation feature has a first portion laterally stacked between the first and second gate structures and a second portion laterally stacked between the first and second epitaxial features. A width of the first portion of the isolation feature is larger than a width of the second portion of the isolation feature.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and first channel structures and second channel structures formed over the substrate. The semiconductor structure also includes a dielectric fin structure formed between the first channel structures and the second channel structures. In addition, the dielectric fin structure includes a core portion and first connecting portions connected to the core portion. The semiconductor structure also includes a gate structure including a first portion. In addition, the first portion of the gate structure is formed around the first channel structures and covers the first connecting portions of the dielectric fin structure.

Abstract: Techniques are described for decoding video data. A video decoder may determine chroma blocks in a chroma quantization group (QG) of the video data, determine a quantization parameter predictor that is the same for each of the chroma blocks of the chroma QG, determine an offset value that is the same for two or more of the chroma blocks of the chroma QG, determine a quantization parameter value for each of the two or more of the chroma blocks in the chroma QG based on the quantization parameter predictor and the offset value inverse quantize coefficients of one or more residual blocks for the chroma blocks based on the determined quantization parameter value, generate the one or more residual blocks based on the inverse quantized coefficients, and reconstruct the chroma blocks based on the one or more residual blocks.

Abstract: A method for manufacturing an integrated circuit device is provided. The method includes depositing an epitaxial stack comprising alternative first and second semiconductor layers over a semiconductor substrate; patterning the epitaxial stack to form first and second semiconductor fins; removing the first semiconductor layers in the first and second semiconductor fins, while leaving a first set of the second semiconductor layers in the first semiconductor fin and a second set of the second semiconductor layers in the second semiconductor fin; forming a gate dielectric layer around the first and second sets of the second semiconductor layers; depositing a gate metal layer over the gate dielectric layer; etching a recess in the gate metal layer and between the first and second sets of the second semiconductor layers, wherein the gate metal layer has a first portion below the recess; and forming a dielectric feature in the recess.

Abstract: An example device for coding video data includes a memory configured to store video data; and one or more processing units implemented in circuitry and configured to: store motion information for a first coding tree unit (CTU) line of a picture in a first history motion vector predictor (MVP) buffer of the memory; reset a second history MVP buffer of the memory; and after resetting the second history MVP buffer, store motion information for a second CTU line of the picture in the second history MVP buffer, the second CTU line being different than the first CTU line. Separate threads of a video coding process executed by the one or more processors may process respective CTU lines, in some examples.

Abstract: A device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a deterministic bounding box from which to retrieve reference samples of reference pictures of video data for performing decoder-side motion vector derivation (DMVD) for a current block of the video data; derive a motion vector for the current block according to DMVD using the reference samples within the deterministic bounding box; form a prediction block using the motion vector; and decode the current block using the prediction block.

Abstract: The present disclosure generally relates to a dual free layer (DFL) read head and methods of forming thereof. In one embodiment, a method of forming a DFL read head comprises depositing a DFL sensor, defining a stripe height of the DFL sensor, depositing a rear bias (RB) adjacent to the DFL sensor, defining a track width of the DFL sensor and the RB, and depositing synthetic antiferromagnetic (SAF) soft bias (SB) side shields adjacent to the DFL sensor. In another embodiment, a method of forming a DFL read head comprises depositing a DFL sensor, defining a track width of the DFL sensor, depositing SAF SB side shields adjacent to the DFL sensor, defining a stripe height of the DFL sensor and the SAF SB side shield, depositing a RB adjacent to the DFL sensor and the SAF SB side shield, and defining a track width of the RB.

Abstract: Aspects presented herein relate to methods and devices for data processing including an apparatus, e.g., a CPU. The apparatus may obtain an indication of a set of data subunits corresponding to at least one data unit. The apparatus may also arrange data for the set of data subunits into a first data order for the set of data subunits. Further, the apparatus may perform at least one of an encoding process or a decoding process on the data for each data subunit of the set of data subunits. The apparatus may also rearrange the data for the set of data subunits into the first data order for a first data subunit in the set of data subunits and into a second data order for at least one second data subunit in the set of data subunits, where the first data order is different from the second data order.

Abstract: A semiconductor device includes a first channel member over a first backside dielectric feature, a first gate structure engaging the first channel member, a second channel member over a second backside dielectric feature, a second gate structure engaging the second channel member, and a first isolation feature includes a first portion laterally between the first and second backside dielectric features and a second portion laterally between the first and second gate structures. The first isolation feature is in physical contact with the first and second gate structures.

Abstract: A vertically protruding structure is formed. The vertically protruding structure includes a substrate, a first semiconductor layer disposed over the substrate, a channel layer disposed over the first semiconductor layer, and a second semiconductor layer disposed over the channel layer. The first semiconductor layer and the second semiconductor layer each contain a first type of semiconductive material. The channel layer contains a second type of semiconductive material different from the first type. First recesses are formed in the first semiconductor layer and the second semiconductor layer. Each of the first recesses protrudes laterally inward. The first recesses are filled with dielectric spacers. The channel layer and the substrate are laterally trimmed. The remaining portions of the channel layer and the dielectric spacers define second recesses that protrude laterally inward. Gate structures are formed in the second recesses.

Abstract: Semiconductor devices and method of forming the same are provided. In one embodiment, a semiconductor device includes a first transistor and a second transistor. The first transistor includes two first source/drain features and a first number of nanostructures that are stacked vertically one over another and extend lengthwise between the two first source/drain features. The second transistor includes two second source/drain features and a second number of nanostructures that are stacked vertically one over another and extend lengthwise between the two second source/drain features.

Abstract: A semiconductor device includes a substrate and a transistor. The transistor includes a first channel region overlying the substrate and a source/drain region in contact with the first channel region. The source/drain region has a first surface opposite the substrate and side surfaces extending from the first surface. A silicide layer is disposed on the first surface and the side surfaces of the source/drain region.

Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.

Abstract: An example method includes determining, for each respective coding block of a plurality of coding blocks of a current coding tree unit (CTU) of video data in a current picture of video data, a respective search area of a plurality of respective search areas, wherein at least one of the plurality of search areas includes samples of the current picture located outside of the current CTU, and wherein at least one of the plurality of search areas does not include samples of the current picture located outside of the current CTU; selecting, for each respective coding block and from within the respective search area for the respective coding block, a respective predictor block of a plurality of predictor blocks; and reconstructing samples of each respective coding block based on samples included in a corresponding predictor block in the plurality of predictor blocks.

Abstract: A method of forming a semiconductor device includes: forming a fin structure protruding above a substrate, where the fin structure comprises a fin and a layer stack overlying the fin, where the layer stack comprises alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin structure; forming openings in the fin structure on opposing sides of the dummy gate structure, where the openings extend through the layer stack into the fin; forming a dielectric layer in bottom portions of the openings; and forming source/drain regions in the openings on the dielectric layer, where the source/drain regions are separated from the fin by the dielectric layer.

Abstract: Semiconductor devices and method of forming the same are provided. In one embodiment, a semiconductor device includes a first transistor and a second transistor. The first transistor includes two first source/drain features and a first number of nanostructures that are stacked vertically one over another and extend lengthwise between the two first source/drain features. The second transistor includes two second source/drain features and a second number of nanostructures that are stacked vertically one over another and extend lengthwise between the two second source/drain features.

Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes first channel members vertically stacked, second channel members vertically stacked, a first source/drain feature abutting the first channel members, a second source/drain feature abutting the second channel members, a first gate structure engaging the first channel members, a second gate structure engaging the second channel members, a first metal interconnect layer disposed at a frontside of the semiconductor device, and a second metal interconnect layer disposed at a backside of the semiconductor device. The first and second gate structures are stacked vertically between the first and second metal interconnect layers. The exemplary semiconductor structure also includes an isolation structure stacked vertically between the first and second metal interconnect layers. The isolation structure includes an air gap stacked laterally between the first and second gate structures.

Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor device includes a first gate structure engaging a plurality of first channel members that are vertically stacked, a first source/drain feature abutting the first channel members, a second gate structure engaging a plurality of second channel members that are vertically stacked, a second source/drain feature abutting the second channel members, a first backside dielectric feature disposed directly under the first gate structure, and a second backside dielectric feature disposed directly under the second gate structure. A number of the first channel members is larger than a number of the second channel members. A top surface of the first backside dielectric feature is below a top surface of the second backside dielectric feature.

Abstract: A device for encoding video data includes a memory configured to store video data, and a video encoder implemented in circuitry and configured to encode a future picture of the video data having a first display order position, the future picture being included in an intra period (IP) of the video data, the IP comprising a plurality of groups of pictures (GOPs), and after encoding the future picture, encode a picture of an ordinal first GOP of the plurality of GOPs using the future picture as a reference picture, each picture of the ordinal first GOP having display order positions earlier than the first display order position. Encoding the future picture in this manner may result in encoding performance improvements with minimal increases in encoding and decoding complexity.

Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The method includes depositing a spacer layer over an isolation region between adjacent fin structures, and the spacer layer is formed on sidewalls and tops of the fin structures. The method further includes forming a mask on the spacer layer between the fin structures, and the mask has a height substantially less than a height of the fin structures. The method further includes removing portions of the spacer layer and recessing the fin structures to form a spacer and to expose a portion of each fin structure, the spacer includes a first portion having a “U” shape disposed on the isolation region, and the portion of each fin structure has a top surface located at a level substantially below a top surface of the isolation region. The method further includes removing the mask.