Patents by Inventor Jung-Chih Wang

Jung-Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961777
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Hung-Jui Kuo, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Hsiang Hu, Sih-Hao Liao
  • Patent number: 10742783
    Abstract: A data transmitting apparatus, a data receiving apparatus and methods thereof are provided. The data transmitting apparatus includes an encoding module, an encoding table, a first encoding parameter, a second encoding parameter and a transmitting module. The encoding module reads and encodes data content containing at least one data unit. The encoding table records a variety of information of multiple data units, and the variety of information contain a unit content, a number of times encoded and a recorded position of each of the data units. The first encoding parameter provides first information of the data unit, and the first information relate to an existing state of the unit content of the data unit in the encoding table. The second encoding parameter provides second information, and the second information relate to an amount of data units currently recorded in the encoding table. The transmitting module transmits an encoded data.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: August 11, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tsung-Sheng Cheng, Yi-Hung Lu, Kuen-Min Lee, Yu-Chang Chao, Yu-Tse Lin, Jung-Chih Wang
  • Publication number: 20190020743
    Abstract: A data transmitting apparatus, a data receiving apparatus and methods thereof are provided. The data transmitting apparatus includes an encoding module, an encoding table, a first encoding parameter, a second encoding parameter and a transmitting module. The encoding module reads and encodes data content containing at least one data unit. The encoding table records a variety of information of multiple data units, and the variety of information contain a unit content, a number of times encoded and a recorded position of each of the data units. The first encoding parameter provides first information of the data unit, and the first information relate to an existing state of the unit content of the data unit in the encoding table. The second encoding parameter provides second information, and the second information relate to an amount of data units currently recorded in the encoding table. The transmitting module transmits an encoded data.
    Type: Application
    Filed: January 2, 2018
    Publication date: January 17, 2019
    Inventors: Tsung-Sheng Cheng, Yi-Hung Lu, Kuen-Min Lee, Yu-Chang Chao, Yu-Tse Lin, Jung-Chih Wang
  • Patent number: 10089149
    Abstract: A method for scheduling multiple periodic requests includes the following steps. The utilization rate of a processing unit is monitored. Multiple periodic requests are received, where the ith periodic request has an original period Pi and an execution time bi. The original period and the execution time of each periodic request are recorded. When the utilization rate of the processing unit exceeds an upper limit, the period of each periodic request is adjusted to be an updated period Pi?, Pi?=n?+?, n is an integer greater than 1, qi is an integer greater than 0, and ? is an integer greater than or equal to 0. The periodic requests are scheduled according to the updated period of each periodic request and the execution time of each periodic request to obtain a scheduling result. The scheduling result is transmitted.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 2, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuen-Min Lee, Yi-Hung Lu, Jung-Chih Wang
  • Patent number: 9693283
    Abstract: A method for managing periodic packets, a server and a network equipment are provided. The method includes the steps of receiving at least one transmission parameter of a plurality of periodic packets, determining at least one time sequence for rearranging and transmitting the periodic packets according to the at least one transmission parameter, transmitting the at least one time sequence, and receiving and disassembling the periodic packets already rearranged and transmitted according to the at least one time sequence.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: June 27, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Jung-Chih Wang, Chi-Chun Chen, Chin-Yuan Hsiao, Cheng-Lung Chu
  • Publication number: 20170153924
    Abstract: A method for request scheduling and a scheduling device are provided. The method includes the following steps. The utilization rate of a processing unit is monitored. Multiple periodic requests are received, where the ith periodic request has an original period Pi and an execution time bi. The original period and the execution time of each periodic request are recorded. When the utilization rate of the processing unit exceeds an upper limit, the period of each periodic request is adjusted to be an updated period Pi?, P?i=n1i+?, n is an integer greater than 1, qi is an integer greater than 0, and ? is an integer greater than or equal to 0. The periodic requests are scheduled according to the updated period of each periodic request and the execution time of each periodic request to obtain a scheduling result. The scheduling result is transmitted.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 1, 2017
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuen-Ming Lee, Yi-Hung Lu, Jung-Chih Wang
  • Publication number: 20160150553
    Abstract: A method for managing periodic packets, a server and a network equipment are provided. The method includes the steps of receiving at least one transmission parameter of a plurality of periodic packets, determining at least one time sequence for rearranging and transmitting the periodic packets according to the at least one transmission parameter, transmitting the at least one time sequence, and receiving and disassembling the periodic packets already rearranged and transmitted according to the at least one time sequence.
    Type: Application
    Filed: April 1, 2015
    Publication date: May 26, 2016
    Inventors: Jung-Chih Wang, Chi-Chun Chen, Chin-Yuan Hsiao, Cheng-Lung Chu
  • Patent number: 6959066
    Abstract: The present invention relates to a programmable frequency divider having one n-bit adder and one n-bit D Flip Flop. These are used to transform the import clock to the target clock. The adder takes one adjustment parameter and one return signal as a basis to create the first output signal, with the possibility to program the adjustment parameter. The D Flip Flop and the adder create a cycle, which is used to receive the first output signal and its import clock to create the second output signal. The second output signal is separated into a return signal and the target signal. The D Flip Flop sends the return signal back to the adder, which will make addition calculations under the adjustment parameter, finally giving out the target clock with the target signal as a calculation basis.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: October 25, 2005
    Assignee: Elan Microelectronics Corp.
    Inventors: Jung-Chih Wang, Chao-Yu Hu
  • Publication number: 20030184350
    Abstract: The present invention relates to a programmable frequency divider, comprising one n-bit adder and one n-bit D Flip Flop. These are used to transform the import clock to the target clock. The adder takes one adjustment parameter and one return signal as a basis to create the first output signal, with the possibility to program the adjustment parameter. The D Flip Flop and the adder create a cycle, which is used to receive the first output signal and its import clock to create the second output signal. The second output signal is separated into a return signal and the target signal. The D Flip Flop sends the return signal back to the adder, which will make addition calculations under the adjustment parameter, finally giving out the target clock with the target signal as a calculation basis.
    Type: Application
    Filed: March 21, 2003
    Publication date: October 2, 2003
    Applicant: Elan Microelectronics Corp.
    Inventors: Jung-Chih Wang, Chao-Yu Hu