Patents by Inventor Jung-Chin Lai

Jung-Chin Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9904253
    Abstract: A method and apparatus for measuring an elapsed time from a starting signal to an ending signal in a time-to-digital converter. Primarily, the invention calculates an amount of complete cycles from the starting signal to a starting edge of a next clock cycle or the next Nth clock cycle (N is a natural number great than one) after the clock cycle corresponding to the ending signal. The amount is multiplied by a cycle time of the coarse clock to obtain a coarse time value. A time residue is calculated from the ending signal to the starting edge. Finally, the time residue is subtracted from the coarse time value to obtain a required time.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: February 27, 2018
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Terng-Yin Hsu, Chi-Hsu Chen, Jung-Chin Lai, Hsiang-Ming Yen
  • Patent number: 8019393
    Abstract: A signal receiver circuit including a transmission gate, a pull-low unit, a boost capacitor, a voltage division unit, and a receiver unit is provided. The transmission gate determines whether to conduct an input signal according to a control signal. The pull-low unit determines whether to pull down the voltage at a terminal of the boost capacitor according to the control signal. The boost capacitor boosts the input signal of the receiver unit. The voltage division unit sends a divided voltage to another terminal of the boost capacitor according to the control signal. When an input signal is received, the boost capacitor boosts the input signal, for overcoming low current issue caused by high threshold voltage of MOS transistors and accordingly the receiver unit achieves full swing.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: September 13, 2011
    Assignee: Nanya Technology Corporation
    Inventor: Jung-Chin Lai
  • Publication number: 20090042531
    Abstract: A signal receiver circuit including a transmission gate, a pull-low unit, a boost capacitor, a voltage division unit, and a receiver unit is provided. The transmission gate determines whether to conduct an input signal according to a control signal. The pull-low unit determines whether to pull down the voltage at a terminal of the boost capacitor according to the control signal. The boost capacitor boosts the input signal of the receiver unit. The voltage division unit sends a divided voltage to another terminal of the boost capacitor according to the control signal. When an input signal is received, the boost capacitor boosts the input signal, for overcoming low current issue caused by high threshold voltage of MOS transistors and accordingly the receiver unit achieves full swing.
    Type: Application
    Filed: December 13, 2007
    Publication date: February 12, 2009
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventor: Jung-Chin Lai