Patents by Inventor Jung-Chun Wang

Jung-Chun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250029589
    Abstract: An acoustic metasurface structure is configured to absorb sounds. The acoustic metasurface structure comprises a main body, an externally-connecting configuration and an inner configuration. The externally-connecting configuration and the inner configuration are respectively formed inside the main body. An externally-connecting tube of the externally-connecting configuration is in fluid communication with an external environment and an externally-connecting cavity of the externally-connecting configuration. An inner tube of the inner configuration is in fluid communication with the externally-connecting cavity and an inner cavity of the inner configuration. With the externally-connecting configuration and the inner configuration forming a series-type structure in the main body, the acoustic metasurface structure increases an acoustic impedance.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Inventors: JUNG-SAN CHEN, TZU-HUEI KUO, WEI-CHUN WANG, WEN-YANG LO, CHENG-YI WANG
  • Patent number: 5811853
    Abstract: A method of forming a memory cell structure in a semiconductor substrate that does not have a shorting problem between a floating gate and a source/drain region of the substrate by depositing a thick spacer oxide layer on top of the floating gate and the source/drain region to a sufficient thickness such that electrical insulation is provided thereinbetween to prevent the occurrence of a short or the formation of a silicide bridge. The invention is also directed to a semiconductor device fabricated by the method.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: September 22, 1998
    Assignee: Winbond Electronics Corp.
    Inventor: Jung-Chun Wang
  • Patent number: 5597751
    Abstract: A method of forming a memory cell structure in a semiconductor substrate that does not have a shorting problem between a floating gate and a source/drain region of the substrate by depositing a thick spacer oxide layer on top of the floating gate and the source/drain region to a sufficient thickness such that electrical insulation is provided thereinbetween to prevent the occurrence of a short or the formation of a silicide bridge. The invention is also directed to a semiconductor device fabricated by the method.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: January 28, 1997
    Assignee: Winbond Electronics Corp.
    Inventor: Jung-Chun Wang