Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: A switching amplifier includes a level shifting circuit for adjusting a voltage level of an original input signal to generate a first input signal and a second input signal. The first input signal is identical to the original input signal except for referring to a first reference level. The second input signal is identical to the original input signal except for referring to a second reference level. In response to the first input signal and an oscillating signal, a first control circuit generates a first width-limited PWM signal for controlling a first half-bridge switching circuit. In response to the second input signal and the oscillating signal, a second control circuit generates a second width-limited PWM signal for controlling a second half-bridge switching circuit.

Abstract: The continuing need for faster and denser SRAM memories places a constant increased demand on the power consumption of the memory devices. Much of the power consumption occurs during the pre-charge phase where it is common practice to bring up all pre-charge circuits at once and hold them active until the memory operations are complete. This invention describes a design where each pre-charge circuit connected to a group of memory cells through bit lines is activated at a separate time from the other pre-charge circuits. Thus each pre-charge circuit is active only during the time that useful work is being done with that portion of the memory. This reduces power consumption by not powering on circuits and precharging bit lines before they are actually needed.