Abstract: A non-volatile memory device includes a memory cell array region in which memory cells are vertically stacked on a substrate and a page buffer region in which first and second page buffers are arranged. A first distance between the memory cell array region and the first page buffer is shorter than a second distance between the memory cell array region and the second page buffer. The first page buffer includes a first transistor driven in response to a first control signal. The second page buffer includes a second transistor driven in response to a second control signal corresponding to the first control signal. At least one of design constraints and processing constraints with respect to the first and second transistors is different.

Abstract: A high voltage switch circuit of a nonvolatile memory device includes a high voltage transistor, logic, and a high voltage switch. The high voltage transistor is turned-on based on a program turn-on voltage and transfers a program voltage to a first memory block. The logic generates path selection signals based on an enable signal and switching control signals based on one of an operating parameter of the nonvolatile memory device or an access address for at least a portion of the first memory block. The enable signal is activated during a program operation on the first memory block. The high voltage switch delivers the program turn-on voltage to a gate of the high voltage transistor via one of a plurality of delivery paths based on the path selection signals. As a result, influence of a negative bias temperature instability (NBTI) generated by the program turn-on voltage is dispersed.

Abstract: An instant messaging service providing method and a user terminal for performing the instant messaging service providing method including receiving and displaying a first message that is created by a message transmitter; determining whether a message switching condition is met after the first message is displayed; and displaying a second message that is created by the message transmitter when the message switching condition is determined to be met.

Abstract: A non-volatile memory device may include a memory cell array including a plurality of planes, a page buffer connected to the memory cell array and corresponding to each of the plurality of planes, and a decoupling circuit. The page buffer is configured to receive a bit line voltage control signal (BLSHF) via a first node. The decoupling circuit is connected to the first node. The decoupling circuit includes at least one decoupling capacitor configured to execute charge sharing via the first node.

Abstract: An operating method of a nonvolatile memory device is provided. The nonvolatile memory device includes first and second page buffers, and first and second bit lines connected thereto, respectively. First and second latch nodes of the first page buffer are charged to have a voltage having a first level according to data stored in a first latch of the first page buffer. After the charging of the first latch node is started, a sensing node of the second page buffer is pre-charged. The sensing node is connected to the second bit line. Data stored in the first latch is dumped into a second latch of the first page buffer during the pre-charging of the sensing node of the second page buffer.

Abstract: Provided herein is a laser beam combination system. The laser beam combination system includes a laser emitter array including a plurality of laser emitters arranged therein, a first combination lens, through which a plurality of laser beams emitted from the laser emitters are concentrated in a first axis direction, so that the plurality of laser beams are converted to each have an oval cross-section having a long axis that is parallel to a second axis, and a second combination lens disposed at a focal point of the first combination lens to combine the plurality of laser beams converted by the first combination lens at a predetermined target.

Abstract: Provided is a laser radar system. The laser radar system includes a first transmission and reception unit sequentially radiating a first laser beam to a plurality of locations within a first view range and receiving a reflected light; and a second transmission and reception unit sequentially radiating a second laser beam to a plurality of locations within a second view range and receiving a reflected light, wherein each of the first transmission and reception unit and the second transmission and reception unit is fixed to a loader and independently searches for the first view range and the second view range.

Abstract: Disclosed is a laser radar apparatus. The laser radar apparatus includes: a light transmission unit configured to output a laser pulse by using a light source; a light reception unit configured to receive a reflected laser pulse in connection with the laser pulse; and a controller configured to adjust a repetition rate of the laser pulse of the light source, in which the controller adjusts the repetition rate of the laser pulse based on at least one of reception power, a target distance, a movement speed, a vertical angle, and a radiation angle.

Abstract: Provided herein a laser radar apparatus including a plurality of light transmission and reception modules arranged concavely in an opposite direction to a scanning direction based on a surface vertical to the scanning direction, wherein each of the plurality of light transmission and reception modules comprises a transmitter configured to deflect a laser beam and to irradiate the deflected laser beam to a target; and a receiver configured to receive the laser beam reflected from the target.

Abstract: An operating method of a nonvolatile memory device is provided. The nonvolatile memory device includes first and second page buffers, and first and second bit lines connected thereto, respectively. First and second latch nodes of the first page buffer are charged to have a voltage having a first level according to data stored in a first latch of the first page buffer. After the charging of the first latch node is started, a sensing node of the second page buffer is pre-charged. The sensing node is connected to the second bit line. Data stored in the first latch is dumped into a second latch of the first page buffer during the pre-charging of the sensing node of the second page buffer.

Abstract: Disclosed are a method and an apparatus for implementing an active imaging system. A method of obtaining an image in an active imaging system including: dividing an imaging region, and determining a plurality of divided imaging regions; scanning each of the plurality of divided imaging regions based on a laser; collecting reflected light for each of the plurality of divided imaging regions, and generating a plurality of divided images by an image sensor; and generating a whole image for the imaging region based on the plurality of divided images.

Abstract: An operating method of a nonvolatile memory device is provided. The nonvolatile memory device includes first and second page buffers, and first and second bit lines connected thereto, respectively. First and second latch nodes of the first page buffer are charged to have a voltage having a first level according to data stored in a first latch of the first page buffer. After the charging of the first latch node is started, a sensing node of the second page buffer is pre-charged. The sensing node is connected to the second bit line. Data stored in the first latch is dumped into a second latch of the first page buffer during the pre-charging of the sensing node of the second page buffer.

Abstract: Provided herein is a laser beam combination system. The laser beam combination system includes a laser emitter array including a plurality of laser emitters arranged therein, a first combination lens, through which a plurality of laser beams emitted from the laser emitters are concentrated in a first axis direction, so that the plurality of laser beams are converted to each have an oval cross-section having a long axis that is parallel to a second axis, and a second combination lens disposed at a focal point of the first combination lens to combine the plurality of laser beams converted by the first combination lens at a predetermined target.

Abstract: Provided herein is an optical scanner. The optical scanner includes one or more light sources, a reflector configured to reflect beam reaching from the one or more light sources toward a scan target, an optical lens system including one or more lenses, which are sequentially disposed along a route of the beam between the one or more light sources and the reflector, and a controller configured to control at least one of a movement of the one or more light sources and a movement of the reflector. In the optical lens system, a focal plane is at the one or more light source and an aperture is at the reflector, thereby securing a high scan speed with a small size of the scanner.

Abstract: A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.

Abstract: A method of programming a nonvolatile memory device is provided which includes applying a program voltage to selected ones of a plurality of memory cells; applying a selected one of a plurality of verification voltages after pre-charging bit lines connected to memory cells to which the program voltage is applied; sensing the memory cells to which the selected verification voltage is applied; selecting memory cells programmed to a target state referring to the sensing result and target state data; and determining whether programming of the selected memory cells is passed or failed.

Abstract: To program in a nonvolatile memory device include a plurality of memory cells that are programmed into multiple states through at least two program steps, a primary program is performed from an erase level to a first target level with respect to the memory cells coupled to a selected word line A preprogram is performed from the erase level to a preprogram level in association with the primary program with respect to the memory cells coupled to the selected word line, where the preprogram level is larger than the erase level and smaller than the first target level A secondary program is performed from the preprogram level to a second target level with respect to the preprogrammed memory cells coupled to the selected word line.

Abstract: An operating method of a nonvolatile memory device is provided. The nonvolatile memory device includes first and second page buffers, and first and second bit lines connected thereto, respectively. First and second latch nodes of the first page buffer are charged to have a voltage having a first level according to data stored in a first latch of the first page buffer. After the charging of the first latch node is started, a sensing node of the second page buffer is pre-charged. The sensing node is connected to the second bit line. Data stored in the first latch is dumped into a second latch of the first page buffer during the pre-charging of the sensing node of the second page buffer.

Abstract: A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.

Abstract: A method of programming a nonvolatile memory device is provided which includes applying a program voltage to selected ones of a plurality of memory cells; applying a selected one of a plurality of verification voltages after pre-charging bit lines connected to memory cells to which the program voltage is applied; sensing the memory cells to which the selected verification voltage is applied; selecting memory cells programmed to a target state referring to the sensing result and target state data; and determining whether programming of the selected memory cells is passed or failed.