Patents by Inventor Jung Hoon Choi

Jung Hoon Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200214135
    Abstract: There is provided a printed circuit board including: a first insulating layer; a first circuit pattern formed on a first surface of the first insulating layer; an adhesive layer provided on a second surface of the first insulating layer; and an electronic component disposed on the adhesive layer and enclosed by the first insulating layer and a second insulating layer formed on the first insulating layer.
    Type: Application
    Filed: March 9, 2020
    Publication date: July 2, 2020
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Hyun PARK, Yong Ho BAEK, Jae Hoon CHOI
  • Patent number: 10695390
    Abstract: The present invention relates to: a composition comprising a Sicyos angulatus extract or a fraction thereof as an effective ingredient for preventing, alleviating, or treating liver diseases; and a method for preventing or treating liver diseases, comprising a step of administering the composition to a subject suspected of having a liver disease.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: June 30, 2020
    Assignee: KOREA RESEARCH INSTITUTE OF BIOSCIENCE AND BIOTECHNOLOGY
    Inventors: Chul Ho Lee, Yong-Hoon Kim, Jung Ran Noh, Dong Hui Choi, Jung Hwan Hwang, Kyoung Shim Kim, Yun-Jung Seo, In-Bok Lee, Jung-Hyeon Choi
  • Patent number: 10692554
    Abstract: A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 23, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hoon Son, Si-Hong Kim, Chang-Kyo Lee, Jung-Hwan Choi, Kyung-Soo Ha
  • Patent number: 10683209
    Abstract: A method for manufacturing polysilicon, according to the present invention, is capable of manufacturing polysilicon with high purity more efficiently in such a manner that a high-temperature and high-speed air stream is formed at the center of a reaction tube, and a high-temperature region may be formed by a vortex formed by the high-temperature and high-speed air stream, so that a raw gas supplied from the side wall of the reaction tube flows by the guiding of the vortex, thereby increasing a stay time and a reaction time of the raw gas within the reaction tube. Furthermore, since the inner wall of the reaction tube is provided with a heat release means, the rapid cooling of a silicon crystal deposited on the inner wall of the reaction tube can induce a columnar crystal in which the silicon crystal is solidified in a direction perpendicular to a crystal face, and it is easy to desorb the silicon crystal produced by rapid heat release via the inner wall of the reaction tube.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: June 16, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Eunsu Jang, Yoo Seok Kim, Jaesung Kim, Jeong Kyu Kim, Jin Hyoung Yoo, Jung Woo Lee, Ye Hoon Im, Jun Won Choi
  • Publication number: 20200184867
    Abstract: A source driver integrated circuit of the present invention comprises: a sensing circuit for receiving a sensing signal for pixels through a sensing line connected to the pixels, converting the sensing signal so as to generate sensing data, and generating a fault signal if an abnormal signal that exceeds an input range is received from the sensing line; and a data driving circuit for receiving, from the data processing circuit, image data which is processed to be compensated according to the sensing data and a data control signal in which the fault signal is reflected, converting the image data so as to generate data voltage, and controlling supply of the data voltage to the pixels according to the data control signal.
    Type: Application
    Filed: July 5, 2018
    Publication date: June 11, 2020
    Inventors: Jeong Hoon Choi, Dong Ju Kim, Su Hun Yang, Jung Bae Yun, Jeung Hie Choi
  • Publication number: 20200185638
    Abstract: A display device includes: a first base substrate which comprises a plurality of pixels; a pixel electrode on the first base substrate in each of the pixels and comprises a reflective film; an organic layer on the pixel electrode; and a common electrode on the organic layer, wherein the pixel electrode has a reflectance of 80% or more for light in a first wavelength range of 420 nm to 470 nm.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 11, 2020
    Inventors: Jung Ho CHOI, Nam Su KANG, Yi Seul KIM, Heung Su PARK, Hyun Shik LEE, Heun Seung LEE, Jae Hoon HWANG
  • Patent number: 10679717
    Abstract: A nonvolatile memory (NVM) device includes a data pin, a control pin, an on-die termination (ODT) pin, and a plurality of NVM memory chips commonly connected to the data pin and the control pin. A first NVM chip among the NVM chips includes an ODT circuit. The first NVM chip determines one of an ODT write mode and an ODT read mode based on a control signal received through the control pin and an ODT signal received through the ODT pin, uses the ODT circuit to perform an ODT on the data pin during the ODT write mode, and uses the ODT circuit to perform the ODT on the control pin during the ODT read mode.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: June 9, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Ji Kim, Jung-June Park, Jeong-Don Ihm, Byung-Hoon Jeong, Young-Don Choi
  • Patent number: 10681098
    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an L1 signaling generator configured to generate L1 signaling including first information and second information; a frame generator configured to generate a frame including a payload including a plurality of sub frames; and a signal processor configured to insert a preamble including the L1 signaling in the frame and transmit the frame. The first information includes information required for decoding a first sub frame among the plurality of sub frames. Therefore, a processing delay in a receiving apparatus is reduced.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: June 9, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hyun Park, Min-ho Kim, Sung-woo Park, Sung-kyu Jung, Chang-hoon Choi, Doo-chan Hwang
  • Publication number: 20200176467
    Abstract: A vertical memory device may include a channel connecting pattern on a substrate, gate electrodes spaced apart from each other in a first direction on the channel connecting pattern, and a channel extending in the first direction through the gate electrodes and the channel connecting pattern. Each of the electrodes may extend in a second direction substantially parallel to an upper surface of the substrate, and the first direction may be substantially perpendicular to the upper surface of the substrate. An end portion of the channel connecting pattern in a third direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the second direction may have an upper surface higher than an upper surface of other portions of the channel connecting pattern except for a portion thereof adjacent the channel.
    Type: Application
    Filed: July 19, 2019
    Publication date: June 4, 2020
    Inventors: Ji-Hoon Choi, Sung-Gil Kim, Jung-Hwan Kim, Chan-Hyoung Kim, Woo-Sung Lee
  • Publication number: 20200173589
    Abstract: A quick connector assembly configured to, when a coupling case is separated from an outer case, airtightness may be maintained without fully separating the fixing member. The quick connector assembly includes an tubular outer case having a hollow portion, a coupling case inserted into the hollow portion to be connected to the outer case so as to allow fluid flow, an airtightness maintaining member provided inside the hollow portion and coupled to an outer surface of the coupling case to maintain airtightness between the coupling case and the outer case, and a fixing member detachably fitted from an outside of the outer case to fix the coupling case inserted into the hollow portion by elasticity thereof, wherein the fixing member is introduced toward the hollow portion from outside of the outer case to thereby fix an outer surface of the coupling case located inside the hollow portion by compression.
    Type: Application
    Filed: October 31, 2019
    Publication date: June 4, 2020
    Applicant: HS R & A CO., LTD
    Inventors: Jae Hyeok Choi, Guk Hyun Kim, Seung Hoon Sung, Jung Hyun Shin
  • Patent number: 10672436
    Abstract: A memory device includes; a first memory chip including a first on-die Termination (ODT) circuit comprising a first ODT resistor, a second memory chip including a second ODT circuit comprising a second ODT resistor, at least one chip enable signal pin that receives at least one chip enable signal, wherein the at least one chip enable signal selectively enables at least one of the first memory chip and the second memory chip, and an ODT pin commonly connected to the first memory chip and the second memory chip that receives an ODT signal, wherein the ODT signal defines an enable period for at least one of the first ODT circuit and the second ODT circuit, and in response to the ODT signal and the at least one chip enable signal, one of the first ODT resistor and the second ODT resistor is enabled to terminate a signal received by at least one of the first memory chip and the second memory chip.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ji Kim, Jung-June Park, Jeong-Don Ihm, Byung-Hoon Jeong, Young-Don Choi
  • Patent number: 10673278
    Abstract: Provided is a wireless power transmission device to reduce an electromagnetic wave except for a signal to be transmitted during wireless power transmission, the wireless power transmission device including a transmitter configured to generate a magnetic field by inputting a high-frequency power signal generated by a transmission circuit into a first coil, a receiver configured to generate an induced current by allowing the generated magnetic field to pass through a second coil, and a reducer configured to reduce a harmonic component of the high-frequency power signal using a third coil inserted on a path between the transmitter and the receiver.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: June 2, 2020
    Assignees: Electronics and Telecommunications Research Institute, DONGYANG E&P INC.
    Inventors: Jung Ick Moon, Seong Uk Baek, Byoung In Lee, Woo Chul Lee, Jong Seup Lee, Dong Woo Cheon, Sang Bong Jeon, Seong Min Kim, Duk Ju Ahn, In Kui Cho, Byung Chan Kim, Je Hoon Yun, Dong Won Jang, Hyung Do Choi
  • Patent number: 10674608
    Abstract: There is provided a printed circuit board including: a first insulating layer; a first circuit pattern formed on a first surface of the first insulating layer; an adhesive layer provided on a second surface of the first insulating layer; and an electronic component disposed on the adhesive layer and enclosed by the first insulating layer and a second insulating layer formed on the first insulating layer.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Hyun Park, Yong Ho Baek, Jae Hoon Choi
  • Patent number: 10654424
    Abstract: Disclosed herein is a composite panel for sound absorption that may absorb and block noise. The composite panel may include: a first perforated panel comprising first embosses and first perforation groups formed in a predetermined pattern, wherein the first embosses are formed by forming a plurality of cells and the first perforation groups are formed by collecting a plurality of first perforated holes; an embossed panel comprising second embosses formed by forming the plurality of cells and coupled to the first perforated panel wherein the embossed panel is laminated with the first perforated panel; and a sound absorbing and insulating material inserted between the first perforated panel and the embossed panel.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: May 19, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation, Hantec Technology Co., Ltd.
    Inventors: Jae Gi Sim, Jung Hyeok Lim, Sung Il Choi, Ki Hoon Son
  • Patent number: 10651194
    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: May 12, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hoon Choi, Sung Gil Kim, Seulye Kim, Jung Ho Kim, Hong Suk Kim, Phil Ouk Nam, Jae Young Ahn, Han Jin Lim
  • Patent number: 10644299
    Abstract: Disclosed is a battery module, which includes a battery cell assembly having at least one battery cell, a module case configured to accommodate the battery cell assembly, and a module connector mounted at the module case, wherein the module connector includes a connector pin electrically connected to the battery cell assembly at the inside of the module case so as to be connected to an external connector at the outside of the module case, a connector housing mounted to an outer surface of the module case to surround the connector pin, and a sealing member provided between the connector housing and the module case.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 5, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Jung-Hoon Lee, Jeong-O Mun, Eun-Gyu Shin, Yoon-Koo Lee, Jong-Young Lee, Byoung-Cheon Jeong, Mi-Geum Choi, Torsten Karcher, Andreas Track
  • Publication number: 20200135072
    Abstract: Disclosed are a device and method for measuring an organic light emitting diode, which measures an amount of energy for compensating for a burn-in of an organic light emitting diode, by sensing a charged voltage of a sensing line connected to the organic light emitting diode. The device for measuring an organic light emitting diode includes an external current source, and is configured to measure an amount of energy for compensating for a burn-in, by sensing a charged voltage of a parasitic capacitor of a sensing line.
    Type: Application
    Filed: February 7, 2018
    Publication date: April 30, 2020
    Applicant: SILICON WORKS CO., LTD.
    Inventors: Kyung Jik MIN, Jeong Hoon CHOI, Dong Ju KIM, Jung Bae YUN
  • Publication number: 20200135247
    Abstract: A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.
    Type: Application
    Filed: December 19, 2019
    Publication date: April 30, 2020
    Inventors: YOUNG-HOON SON, SI-HONG KIM, CHANG-KYO LEE, JUNG-HWAN CHOI, KYUNG-SOO HA
  • Publication number: 20200137211
    Abstract: An example method and a device for providing content to at least one external device are provided. The example method includes communicating with the at least one external device, displaying a plurality of contents stored in the device on a screen of the device, determining whether the at least one external device is executing an application corresponding to an application being executed in the device, and providing at least one of the displayed plurality of contents to the at least one external device, based on the determination.
    Type: Application
    Filed: December 30, 2019
    Publication date: April 30, 2020
    Inventors: Jung-kih HONG, Min-suk CHOI, Seong-hoon KANG, Yoon-suk CHOI
  • Patent number: 10637112
    Abstract: Disclosed are a busbar for cooling battery cells and a battery module using the same. The busbar for cooling battery cells is a busbar configured to cool a plurality of battery cells included in a battery module, and includes: a body portion formed in a strap shape and contacting an electrode lead of each battery cell; and a bent portion integrally formed with the body portion and extending from one end of the body portion to be bent in a thickness direction of the body portion, wherein the bent portion includes: a coupling groove coupled to a coupling protrusion that is prepared on a cooling plate of the battery module or a coupling protrusion that is prepared on a predetermined frame of the battery module, the predetermined frame supporting the busbar; and a thermal contact surface thermally contacting the cooling plate.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: April 28, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Eun-Gyu Shin, Jeong-O Mun, Yoon-Koo Lee, Jung-Hoon Lee, Jong-Young Lee, Byoung-Cheon Jeong, Mi-Geum Choi, Hang-June Choi, Alexander Eichhorn, Andreas Track