Abstract: A display device includes a substrate including an active area and a dummy area, and including a plurality of sub-pixels arranged in m rows and n columns, first initialization power lines which provide a first initialization voltage to sub-pixels of the plurality of sub-pixels and extending in a column direction, second initialization power lines which provide a second initialization voltage to sub-pixels of the plurality of sub-pixels and extending in the column direction, and repair lines extending in a row direction. Sub-pixels of the dummy area are arranged in an outermost column of the n columns, the repair lines are arranged so as to connect the sub-pixels of the dummy area and sub-pixels of the active area among the plurality of sub-pixels, respectively, and m and n are natural numbers.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A scan driver of a display device includes a plurality of stages. Each stage includes a clock line configured to receive a first clock signal and a second clock signal having different phases, a shared input circuit configured to transfer an input signal to a shared control node, a first output circuit coupled to the shared control node, configured to transfer a voltage of the shared control node to a first control node, and configured to output a first scan signal in response to a voltage of the first control node and the first clock signal, and a second output circuit coupled to the shared control node, configured to transfer the voltage of the shared control node to a second control node, and configured to output a second scan signal in response to a voltage of the second control node and the second clock signal.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A scan driver of a display device includes a plurality of stages. Each stage includes a clock line configured to receive a first clock signal and a second clock signal having different phases, a shared input circuit configured to transfer an input signal to a shared control node, a first output circuit coupled to the shared control node, configured to transfer a voltage of the shared control node to a first control node, and configured to output a first scan signal in response to a voltage of the first control node and the first clock signal, and a second output circuit coupled to the shared control node, configured to transfer the voltage of the shared control node to a second control node, and configured to output a second scan signal in response to a voltage of the second control node and the second clock signal.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes a defect inspection circuit, and a display panel having a display area and a peripheral area positioned outside the display area. The display panel includes a sensing wire positioned in the peripheral area and connected to the defect inspection circuit. The defect inspection circuit includes a resistance detection circuit that detects a resistance of the sensing wire based on an output signal corresponding to the sensing wire, a memory that stores first resistance information related to the resistance of the sensing wire detected in a first inspection operation, and a comparator circuit including a first comparator that compares the first resistance information with second resistance information. The second resistance information is related to the resistance of the sensing wire detected in a second inspection operation that is performed at a different time than the first inspection operation.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se

Abstract: A display panel includes a displaying area including pixels, a non-displaying area including a dummy pixel, and a switching circuit to transfer a data signal to the dummy pixel in response to a control signal. The display panel may compensate for defective pixels located in different data lines using only one dummy pixel column and may minimize an area (e.g., a dead space) including the dummy pixel column by including a distributor buffering a signal of an output line and a switching circuit selecting/providing a portion of a signal of the output line to a dummy data line.

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se

Abstract: A display device includes a defect inspection circuit, and a display panel having a display area and a peripheral area positioned outside the display area. The display panel includes a sensing wire positioned in the peripheral area and connected to the defect inspection circuit. The defect inspection circuit includes a resistance detection circuit that detects a resistance of the sensing wire based on an output signal corresponding to the sensing wire, a memory that stores first resistance information related to the resistance of the sensing wire detected in a first inspection operation, and a comparator circuit including a first comparator that compares the first resistance information with second resistance information. The second resistance information is related to the resistance of the sensing wire detected in a second inspection operation that is performed at a different time than the first inspection operation.

Abstract: A display device includes a pixels unit and a driving unit. The driving unit includes an emission driver coupled to a first clock line and a second clock line and configured to receive therefrom a first clock signal and a second clock signal, respectively, and to generate an emission control signal provided to the pixels based on the first clock signal and the second clock signal and a scan driver coupled to the emission driver through a first coupling line and a second coupling line, the scan driver configured to receive the first clock signal and the second clock signal from the emission driver and to generate a scan signal provided to the pixels based on the first clock signal and the second clock signal.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se