Abstract: An MXene or a derivative thereof, on which nitrous oxide reductase is immobilized, wherein the MXene has a formula of Mn+1XnTs, wherein M is a transition metal of Groups 3, 4, 5, 6, or a combination thereof, of the Periodic Table of the Elements, X is carbon, nitrogen, or a combination thereof, T is oxide, epoxide, hydroxide, C1-C5 alkoxide, fluoride, chloride, bromide, iodide, or a combination thereof, and n is 1, 2, or 3, and s is 0, 1, or 2.

Abstract: A display device according to embodiments of the present invention includes pixels, each of the pixels includes a first transistor and a bypass transistor, the first transistor includes a first sub-driving transistor and a second sub-driving transistor, the first sub-driving transistor has a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, the second sub-driving transistor has a gate electrode connected to the first node, a first electrode connected to the third node, and a second electrode connected to a fourth node, and the bypass transistor is connected in parallel to one of the first sub-driving transistor and the second sub-driving transistor.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A display device includes a display panel including pixel driving circuits and light emitting elements, a data driver that outputs data voltages to the pixel driving circuits, and a timing controller that controls the data driver. The data driver includes a first amplifier and second amplifiers. The first amplifier outputs first data voltages to a first data line connected to first pixel driving circuits arranged in a first column and output second data voltages to a second data line connected to second pixel driving circuits arranged in a second column. The second amplifiers output third data voltages to third data lines connected to third pixel driving circuits arranged in third columns which are disposed between the first column and the second column. Thus, the display device reduces the number of amplifiers included in the data driver.

Abstract: A pixel circuit includes a driving transistor which generates a driving current and including a first electrode connected to a first node, a gate electrode connected to a gate node, and a second electrode connected to a second node, a writing transistor connected to the driving transistor through the first node and including a first electrode which receives a data voltage, a gate electrode which receives a write gate signal, and a second electrode connected to the first node, a compensation transistor including a gate electrode, a first electrode connected to the gate node, and a second electrode connected to the second node, a gate-drain capacitor connected in parallel with the compensation transistor and including a first electrode connected to the gate node and a second electrode connected to the second node, and a light emitting element that emits light based on the driving current.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A display device includes a substrate including an active area and a dummy area, and including a plurality of sub-pixels arranged in m rows and n columns, first initialization power lines which provide a first initialization voltage to sub-pixels of the plurality of sub-pixels and extending in a column direction, second initialization power lines which provide a second initialization voltage to sub-pixels of the plurality of sub-pixels and extending in the column direction, and repair lines extending in a row direction. Sub-pixels of the dummy area are arranged in an outermost column of the n columns, the repair lines are arranged so as to connect the sub-pixels of the dummy area and sub-pixels of the active area among the plurality of sub-pixels, respectively, and m and n are natural numbers.

Abstract: A display device includes a substrate including an active area and a dummy area, and including a plurality of sub-pixels arranged in m rows and n columns, first initialization power lines which provide a first initialization voltage to sub-pixels of the plurality of sub-pixels and extending in a column direction, second initialization power lines which provide a second initialization voltage to sub-pixels of the plurality of sub-pixels and extending in the column direction, and repair lines extending in a row direction. Sub-pixels of the dummy area are arranged in an outermost column of the n columns, the repair lines are arranged so as to connect the sub-pixels of the dummy area and sub-pixels of the active area among the plurality of sub-pixels, respectively, and m and n are natural numbers.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A scan driver of a display device includes a plurality of stages. Each stage includes a clock line configured to receive a first clock signal and a second clock signal having different phases, a shared input circuit configured to transfer an input signal to a shared control node, a first output circuit coupled to the shared control node, configured to transfer a voltage of the shared control node to a first control node, and configured to output a first scan signal in response to a voltage of the first control node and the first clock signal, and a second output circuit coupled to the shared control node, configured to transfer the voltage of the shared control node to a second control node, and configured to output a second scan signal in response to a voltage of the second control node and the second clock signal.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A scan driver of a display device includes a plurality of stages. Each stage includes a clock line configured to receive a first clock signal and a second clock signal having different phases, a shared input circuit configured to transfer an input signal to a shared control node, a first output circuit coupled to the shared control node, configured to transfer a voltage of the shared control node to a first control node, and configured to output a first scan signal in response to a voltage of the first control node and the first clock signal, and a second output circuit coupled to the shared control node, configured to transfer the voltage of the shared control node to a second control node, and configured to output a second scan signal in response to a voltage of the second control node and the second clock signal.

Abstract: A display device includes a display panel having a display area and a peripheral area. The display device includes a circuit having a comparator, and first and second sense wires disposed in the peripheral area and connected to the circuit. The comparator compares a first output signal output from the first sense wire and a second output signal output from the second sense wire to generate a comparison result. The circuit determines whether a defect is present in the display device based on the comparison result.

Abstract: A display device includes a defect inspection circuit, and a display panel having a display area and a peripheral area positioned outside the display area. The display panel includes a sensing wire positioned in the peripheral area and connected to the defect inspection circuit. The defect inspection circuit includes a resistance detection circuit that detects a resistance of the sensing wire based on an output signal corresponding to the sensing wire, a memory that stores first resistance information related to the resistance of the sensing wire detected in a first inspection operation, and a comparator circuit including a first comparator that compares the first resistance information with second resistance information. The second resistance information is related to the resistance of the sensing wire detected in a second inspection operation that is performed at a different time than the first inspection operation.

Abstract: A display device includes: a display unit including a first display area, and a second display area; a scan driver configured to provide a scan signal to each scan line connected to the plurality of first pixels and the plurality of second pixels; and an emission controller configured to provide an emission control signal to each emission control line connected to the plurality of first pixels and the plurality of second pixels, wherein the plurality of first pixels have a first density in the first display area, the plurality of second pixels have a second density less than the first density in the second display area, and the plurality of second pixels include at least one sub pixel including one boosting capacitor.

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se

Abstract: An organic light emitting display panel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel for respectively emitting differently colored lights, each of the sub-pixels including a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal, a driving transistor connected to the switching transistor, an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal, an emission control line connected to the gate electrode of the emission control transistor, an organic light emitting diode connected the emission control transistor, and coupling capacitor including a first electrode including a portion of the emission control line, and a second electrode including an anode of the organic light emitting diode overlapping the portion of the emission control line, wherein capacitances of a first capacitor including the coupling capacitor of the first sub-pixel and a se