Patents by Inventor Jung-hun Cho

Jung-hun Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996554
    Abstract: A method for producing a high-nickel positive electrode active material, a positive electrode active material produced thereby, and a positive electrode and a lithium secondary battery including the same is provided. The method includes preparing a lithium composite transition metal oxide having a nickel content of 80 atm % or greater among transition metals, washing the lithium composite transition metal oxide, and mixing the washed lithium composite transition metal oxide with an aluminum raw material and heat treating the mixture at a temperature of 650° C. to 690° C. to obtain a positive electrode active material having a surface portion doped with aluminum.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 28, 2024
    Assignee: LG Energy Solution, Ltd.
    Inventors: Jin Tae Hwang, Dong Hun Lee, Sung Bin Park, Hyung Man Cho, Jung Min Han, Wang Mo Jung
  • Publication number: 20080095953
    Abstract: Provided are an apparatus for depositing a thin film using plasma which can prevent impurities from being formed by inhibiting plasma from being diffused into a nozzle pipe and sustained in the nozzle pipe and improve thickness uniformity of the deposited thin film and a method of depositing the same. The apparatus for depositing a thin film includes a chamber having a substrate holder and an inner space defined by an inner wall; and a nozzle pipe comprising a first end fixed to the inner wall of the chamber; a second end extending into the inner space of the chamber; a flow path penetrating the nozzle pipe from the first end to the second end; and at least one slit which is disposed at the second end and opens the flow path into the inner space of the chamber.
    Type: Application
    Filed: October 24, 2007
    Publication date: April 24, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heok-Jae LEE, Jung-Hun CHO, Se-Hwi CHO, Yun-Sik YANG, Yong-Gyu LIM
  • Patent number: 7205194
    Abstract: A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion of the floating gate layer. A gate interlayer insulating layer pattern is formed inside the opening. After removing the sacrificial layer pattern and etching the floating gate layer (using the gate interlayer insulating layer pattern as an etch mask), a floating gate is formed under the gate interlayer insulating layer pattern. A control gate is formed overlapping a portion of the floating gate.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: April 17, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Sun Lee, Jae-Min Yu, Don-Woo Lee, Jung-Hun Cho, Chul-Soon Kwon, Jung-Ho Moon, In-Gu Yoon, Jae-Hyun Park
  • Publication number: 20060278341
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Application
    Filed: August 21, 2006
    Publication date: December 14, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-hyuck Park, Hee-duk Kim, Jung-hun Cho, Jong-wook Choi, Sung-bum Cho, Young-koo Lee, Jin-sung Kim, Jang-eun Lee, Ju-hyuck Chung, Sun-hoo Park, Jae-hyun Lee, Shin-woo Nam
  • Publication number: 20050064661
    Abstract: A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion of the floating gate layer. A gate interlayer insulating layer pattern is formed inside the opening. After removing the sacrificial layer pattern and etching the floating gate layer (using the gate interlayer insulating layer pattern as an etch mask), a floating gate is formed under the gate interlayer insulating layer pattern. A control gate is formed overlapping a portion of the floating gate.
    Type: Application
    Filed: June 24, 2004
    Publication date: March 24, 2005
    Inventors: Yong-Sun Lee, Jae-Min Yu, Don-Woo Lee, Jung-Hun Cho, Chul-Soon Kwon, Jung-Ho Moon, In-Gu Yoon, Jae-Hyun Park
  • Publication number: 20050022742
    Abstract: Chemical vapor deposition (CVD) processing equipment for use in fabricating a semiconductor device requiring deposition of an insulation layer or a metal layer includes a chamber having an exhaust line in a lower central portion thereof, a heater block for supporting a wafer to be supplied in an interior of the chamber, the heater block having a heating plate in an interior thereof, a support shaft for supporting the heater block, and an electrical wire for providing an electrical connection to the heating plate. The support shaft extends through a bottom of the chamber. The electrical wire extends through the bottom of the chamber within the support shaft.
    Type: Application
    Filed: July 28, 2004
    Publication date: February 3, 2005
    Inventors: Hyung-Sik Hong, Gyeong-Su Keum, Yong-Gab Kim, Chung-Hun Park, Do-In Bae, Seung-Ki Chae, Jung-Hun Cho
  • Patent number: 6797109
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: September 28, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-hyuck Park, Hee-duk Kim, Jung-hun Cho, Jong-wook Choi, Sung-bum Cho, Young-koo Lee, Jin-sung Kim, Jang-eun Lee, Ju-hyuck Chung, Sun-hoo Park, Jae-hyun Lee, Shin-woo Nam
  • Publication number: 20030013315
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Application
    Filed: September 9, 2002
    Publication date: January 16, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-hyuck Park, Hee-duk Kim, Jung-hun Cho, Jong-wook Choi, Sung-bum Cho, Young-koo Lee, Jin-sung Kim, Jang-eun Lee, Ju-hyuck Chung, Sun-hoo Park, Jae-hyun Lee, Shin-woo Nam
  • Publication number: 20030000648
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Application
    Filed: September 5, 2002
    Publication date: January 2, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Hyuck Park, Hee-Duk Kim, Jung-Hun Cho, Jong-Wook Choi, Sung-Bum Cho, Young-Koo Lee, Jin-Sung Kim, Jang-Eun Lee, Ju-Hyuck Chung, Sun-Hoo Park, Jae-Hyun Lee, Shin-Woo Nam
  • Publication number: 20030000459
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Application
    Filed: September 6, 2002
    Publication date: January 2, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-hyuck Park, Hee-duk Kim, Jung-hun Cho, Jong-wook Choi, Sung-bum Cho, Young-koo Lee, Jin-sung Kim, Jang-eun Lee, Ju-hyuck Chung, Sun-hoo Park, Jae-hyun Lee, Shin-woo Nam
  • Patent number: 6464794
    Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: October 15, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-hyuck Park, Hee-duk Kim, Jung-hun Cho, Jong-wook Choi, Sung-bum Cho, Young-koo Lee, Jin-sung Kim, Jang-eun Lee, Ju-hyuck Chung, Sun-hoo Park, Jae-hyun Lee, Shin-woo Nam