Patents by Inventor Jung-Hwan Choi

Jung-Hwan Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250231808
    Abstract: Disclosed is a data processing method of sequentially reading a plurality of non-compressed data groups or a plurality of compressed data groups corresponding to each of the non-compressed data groups from a memory by taking priority in a first direction of dimension over a second direction of dimension of an input array, when it is determined that the elements should be sequentially input to the data operation part by taking priority in the first direction of dimension over the second direction of dimension.
    Type: Application
    Filed: November 6, 2020
    Publication date: July 17, 2025
    Inventors: Jung Hwan CHOI, Sung Mo YANG
  • Patent number: 12352887
    Abstract: One embodiment of the disclosure relates to a vehicle radar device and a method for controlling the same. According to the present embodiments, a vehicle radar device may comprise an antenna unit including Nt transmission antennas and Nr reception antennas, wherein Nt is a natural number equal to or larger than 1, and Nr is a natural number equal to or larger than 2, a transceiver controlling the transmission antenna to transmit a transmission signal and the reception antenna to receive a reception signal reflected by a target, a signal processor detecting one or more peak signals for the target and separately detecting Nt*Nr channel reception signals corresponding to each peak signal, a target angle estimator calculating a target angle estimate from k channel reception signals selected from among the Nt*Nr channel reception signals, and a target size information estimator calculating size information about the target based on up to NV*NrCk target angle estimates calculated by the target angle estimator.
    Type: Grant
    Filed: July 24, 2022
    Date of Patent: July 8, 2025
    Assignee: HL KLEMOVE CORP.
    Inventors: Han Byul Lee, Jung Hwan Choi, Jingu Lee, Tae Hyeong Ha, Jae Hyun Han
  • Patent number: 12332345
    Abstract: The embodiments of the present disclosure relate to a radar device including an antenna unit including a transmission antenna for transmitting a transmission signal and a receiving antenna for receiving a reception signal reflected from a target, a signal processor configured to determine target direction information by using a phase difference between the reception signals received from the respective receiving antennas, and a controller configured to control to perform a first mode and a second mode for transmitting and receiving signals at different pulse repetition intervals, respectively.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: June 17, 2025
    Assignee: HL KLEMOVE CORP.
    Inventors: Jung Hwan Choi, JinGu Lee, Han Byul Lee, Jae Hyun Han
  • Patent number: 12300418
    Abstract: A magnetic coupling device is disclosed. The magnetic coupling device includes a core portion including an upper core and a lower core spaced apart from each other in a first direction, a primary coil and a secondary coil disposed between the upper core and the lower core in the state of being spaced apart from each other in the first direction, and a core connector electrically connected to the upper core and the lower core. A discharge phenomenon of a slim magnetic coupling device is prevented by the provision of the core connector.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: May 13, 2025
    Assignee: LG INNOTEK CO, LTD.
    Inventors: Jung Hwan Choi, In Seong Sohn, So Yeon Kim
  • Patent number: 12219774
    Abstract: A non-volatile memory chip comprises a cell region that includes a first surface, a second surface opposite to the first surface, a first cell structure, and a second cell structure spaced apart from the first cell structure; a peripheral circuit region on the first surface of the cell region, and that includes a first peripheral circuit connected to the first cell structure, a second peripheral circuit connected to the second cell structure, and a connection circuit between the first and second peripheral circuits; a through via between the first and second cell structures and that extends from the second surface of the cell region to the connection circuit of the peripheral circuit region; a redistribution layer that covers the through via on the second surface of the cell region, is connected to the through via, and extends along the second surface; and a chip pad connected to the redistribution layer.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 4, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Jae Lee, Jin Do Byun, Young-Hoon Son, Young Don Choi, Pan Suk Kwak, Myung Hun Lee, Jung Hwan Choi
  • Patent number: 12204046
    Abstract: The embodiments relate to a radar control device and method. Specifically, a radar control device according to the embodiments may include a transceiver configured to transmit a transmission signal to the surroundings of a host vehicle and receive a reception signal received by reflecting the transmission signal on an object, a determiner configured to generate a first range-Doppler map by performing fast Fourier transform (FFT) on the reception signal and generate a second range-Doppler map based on a comparison group including a plurality of preset temporary lateral distances, and determine a correlation coefficient between the first range-Doppler map and the second range-Doppler map, and an estimator configured to estimate a lateral distance between the host vehicle and the object based on the correlation coefficient.
    Type: Grant
    Filed: September 10, 2022
    Date of Patent: January 21, 2025
    Assignee: HL KLEMOVE CORP.
    Inventors: Jingu Lee, Jung Hwan Choi
  • Publication number: 20250012862
    Abstract: A battery capacity prediction apparatus according to an example embodiment disclosed herein includes an extraction unit configured to extract comparison data obtained by comparing a measured capacity of a battery with a reference capacity of the battery and extract capacity change data obtained by measuring a capacity change of the battery with respect to a cycle change of the battery and a controller configured to predict a capacity of the battery based on the comparison data and the capacity change data.
    Type: Application
    Filed: December 19, 2022
    Publication date: January 9, 2025
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventor: Jung Hwan CHOI
  • Patent number: 12177044
    Abstract: A data receiving device may include a dummy stage block. The dummy stage block may include m dummy stages, wherein m is a natural number greater than or equal to two. Each of the m dummy stages may be configured to remove inter-symbol interference (ISI) from a dummy input signal using dummy coefficient information to generate a dummy output signal free of the ISI. Each of the m dummy stages may be further configured to output the dummy output signal. A normal stage block may include n normal stages, wherein n is a natural number greater than or equal to two. Each of the n normal stages may be configured to remove ISI from an input signal using coefficient information to generate an output signal free of the ISI and may be further configured to output the output signal.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: December 24, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Ook Jung, Jae Woo Park, Myoung Bo Kwak, Young Min Ku, Kyoung Jun Roh, Jung Hwan Choi
  • Publication number: 20240420754
    Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.
    Type: Application
    Filed: August 28, 2024
    Publication date: December 19, 2024
    Inventors: DAE-SIK MOON, GIL-HOON CHA, KI-SEOK OH, CHANG-KYO LEE, YEON-KYU CHOI, JUNG-HWAN CHOI, KYUNG-SOO HA, SEOK-HUN HYUN
  • Publication number: 20240402866
    Abstract: A method of displaying an application is provided. The method includes displaying an execution screen of a first application on a first area when the first application is executed, displaying the execution screen of the first application on a second area instead of on the first area when a second application is executed while the first application is executed, and displaying an execution screen of a second application on the first area.
    Type: Application
    Filed: August 13, 2024
    Publication date: December 5, 2024
    Inventors: Young-jin KIM, Sung-hee KIM, Seung-woon LEE, Kang-tae KIM, Tae-soo KIM, Jung-hwan CHOI
  • Patent number: 12118177
    Abstract: A method of displaying an application is provided. The method includes displaying an execution screen of a first application on a first area when the first application is executed, displaying the execution screen of the first application on a second area instead of on the first area when a second application is executed while the first application is executed, and displaying an execution screen of a second application on the first area.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: October 15, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jin Kim, Sung-hee Kim, Seung-woon Lee, Kang-tae Kim, Tae-soo Kim, Jung-hwan Choi
  • Patent number: 12112827
    Abstract: A method includes measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 8, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo Hwan Kim, Jun Young Park, Jin Do Byun, Kwang Seob Shin, Eun Seok Shin, Hyun-Yoon Cho, Young Don Choi, Jung Hwan Choi
  • Patent number: 12106794
    Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: October 1, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi, Jung-Hwan Choi, Kyung-Soo Ha, Seok-Hun Hyun
  • Publication number: 20240319334
    Abstract: The present embodiments relate to a phase error compensation device and method of a radar and a radar device including the same. A phase error compensation device according to an embodiment may include a first determiner configured to determine, for each first distance to a moving target, a first phase error between a phase of a first reception signal corresponding to a first transmission signal transmitted from a first transmission antenna and a phase of a second reception signal corresponding to a second transmission signal from a second transmission antenna, and a lookup table generator configured to generate and store a lookup table for phase compensation including phase compensation values for each distance based on the first phase error for each first distance.
    Type: Application
    Filed: January 15, 2024
    Publication date: September 26, 2024
    Inventors: Jingu LEE, Jung Hwan CHOI
  • Patent number: 12093569
    Abstract: A memory device, a host device and a method of operating the memory device are provided. The memory device includes a data signal generator configured to provide a data signal to a transmission driver, the transmission driver configured to output a multi-level signal having any one of first to third signal levels based on the data signal, a command decoder configured to receive a feedback signal from outside of the memory device and decode the feedback signal, a data signal controller configured to adjust the data signal based on a decoding result of the command decoder, and a drive strength controller configured to adjust at least one of the first to third signal levels based on the decoding result of the command decoder.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: September 17, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo Hwan Kim, Su Cheol Lee, Jin Do Byun, Eun Seok Shin, Young Don Choi, Jung Hwan Choi
  • Patent number: 12072438
    Abstract: The present disclosure relates to a device and method for detecting vertical misalignment of a vehicle radar device and vehicle radar device with the same. A radar device according to an embodiment determines a monitoring range including the ground in front by using the radar signal, determines an error of vertical angles for a number of ground distances within the monitoring range, and detects the vertical mounting misalignment of the radar device by using the error. According to embodiments, it is possible to accurately determine the vertical mounting misalignment of the radar device even if there is a road surface non-uniformity, road slope, or radar beam width change.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: August 27, 2024
    Assignee: HL KLEMOVE CORP.
    Inventors: Han Byul Lee, Ho Young Jin, Jae Hyun Han, Jung Hwan Choi, Jingu Lee
  • Patent number: 12066849
    Abstract: A semiconductor device including an error amplifier configured to receive a voltage of an output node and a reference voltage, a flipped voltage follower (FVF) circuit configured to receive an output of the error amplifier and maintain the voltage of the output node at the reference voltage, and a bias current control circuit configured to receive first to third mode signals, control a magnitude of a bias current flowing through the FVF circuit based on the first to third mode signals, control the bias current of a first magnitude, based on the first mode signal, control the bias current of a second magnitude smaller than the first magnitude, based on the second mode signal, and control the bias current of a third magnitude smaller than the second magnitude, based on the third mode signal.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: August 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Jun Roh, Jae Woo Park, Jun Han Choi, Myoung Bo Kwak, Jung Hwan Choi
  • Patent number: 12068096
    Abstract: An inductor according to an embodiment of the present invention may include: a plurality of first E-type cores, each of which has a base unit and a center leg extending in a first direction from the base unit; a first I-type core arranged in the first direction from the plurality of first E-type cores; and a coil wound around the center leg of each of the plurality of first E-type cores. Here, the plurality of E-type cores may be arranged in a line along the first direction.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: August 20, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Seok Bae, Jai Hoon Yeom, Jung Hwan Choi
  • Patent number: 12057194
    Abstract: A memory device in which reliability of a clock signal is improved is provided. The memory device comprises a data module including a clock signal generator configured to receive an internal clock signal from a buffer, and to generate a first internal clock signal, a second internal clock signal, a third internal clock signal, and a fourth internal clock signal having different phases, on the basis of the internal clock signal, and a first data signal generator configured to generate a first data signal on the basis of first data and the first internal clock signal, generate a second data signal on the basis of second data and the second internal clock signal, generate a third data signal on the basis of third data and the third internal clock signal, and generate a fourth data signal on the basis of fourth data and the fourth internal clock signal.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: August 6, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeok Jun Choi, Young Chul Cho, Seung Jin Park, Jae Woo Park, Young Don Choi, Jung Hwan Choi
  • Patent number: 12033686
    Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: July 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi, Jung-Hwan Choi, Kyung-Soo Ha, Seok-Hun Hyun