Patents by Inventor Jung-Hwan Oh

Jung-Hwan Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • One-cylinder stack capacitor and method for fabricating the same
    Publication number: 20040085708
    Abstract: An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug.
    Type: Application
    Filed: October 20, 2003
    Publication date: May 6, 2004
    Inventors: Jung-Hwan Oh, Ki-Hyun Hwang, Jae-Young Park, In-Seak Hwang, Young-Wook Park
  • One-cylinder stack capacitor and method for fabricating the same
    Patent number: 6700153
    Abstract: An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: March 2, 2004
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Jung-Hwan Oh, Ki-Hyun Hwang, Jae-Young Park, In-Seak Hwang, Young-Wook Park
  • One-cylinder stack capacitor and method for fabricating the same
    Publication number: 20030121132
    Abstract: An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug.
    Type: Application
    Filed: May 2, 2002
    Publication date: July 3, 2003
    Inventors: Jung-Hwan Oh, Ki-Hyun Hwang, Jae-Young Park, In-Seak Hwang, Young-Wook Park