Abstract: A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate. A capping film including an acid source is formed on the exposed surface areas of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain after removing the acid diffused regions of the second mask layer.

Abstract: A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate so as to be separated from one another. A capping film including an acid source is formed on sidewalls and an upper surface of each of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain in the first spaces after removing the acid diffused regions of the second mask layer.

Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Abstract: In a resist reflow measurement key, and method of fabricating a fine pattern of a semiconductor device using the same, the resist reflow measurement key includes a first reflow key including a plurality of first pattern elements each having a first pattern with a first radius of curvature located on a first side of a first center line and a second pattern with a second radius of curvature located on a second side of the first center line, and a second reflow key including a plurality of second pattern elements each having a third pattern with a third radius of curvature located on a first side of a second center line and a fourth pattern with a fourth radius of curvature located on a second side of the second center line, the second reflow key being formed on a same plane of a substrate as the first reflow key.

Abstract: A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate so as to be separated from one another. A capping film including an acid source is formed on sidewalls and an upper surface of each of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain in the first spaces after removing the acid diffused regions of the second mask layer.

Abstract: A phase shifting mask (PSM) for manufacturing a semiconductor device and a method of fabricating the same includes a transparent substrate, a main pattern formed on the transparent substrate and comprising a first phase shifting layer having a first optical transmittance greater than 0, and at least one assistant pattern formed on the transparent substrate proximal to the main pattern for phase-shifting by the same degree as the main pattern and having a second optical transmittance, which is less than the first optical transmittance.

Abstract: In an optical member holder and a projection exposure apparatus having the same, a light beam radiated from a light source may be formed into light having a desired shape by selecting one of a plurality of optical elements. An optical element holder may include a support member to support the plurality of optical elements, a first driving section to move or rotate the support member to select one of the optical elements, and a second driving section to rotate the selected optical element to adjust an arrangement direction thereof. The light formed by the selected optical element may be directed through a reticle.

Abstract: In a resist reflow measurement key, and method of fabricating a fine pattern of a semiconductor device using the same, the resist reflow measurement key includes a first reflow key including a plurality of first pattern elements each having a first pattern with a first radius of curvature located on a first side of a first center line and a second pattern with a second radius of curvature located on a second side of the first center line, and a second reflow key including a plurality of second pattern elements each having a third pattern with a third radius of curvature located on a first side of a second center line and a fourth pattern with a fourth radius of curvature located on a second side of the second center line, the second reflow key being formed on a same plane of a substrate as the first reflow key.

Abstract: In a method of manufacturing a capacitor and a method of manufacturing a dynamic random access memory device, an insulating layer covering an upper portion of a conductive layer may be provided with an ozone gas so as to change the property of the upper portion of the insulating layer. The upper portion of the insulating layer may be chemically removed to expose the upper portion of the conductive layer. The exposed upper portion of the conductive layer may be removed so as to transform the conductive layer into a lower electrode. The remaining portion of the insulating layer may be removed, and an upper electrode may be formed on the lower electrode.

Abstract: Provided are an overlay mark of a semiconductor device and a semiconductor device including the overlay mark. The overlay mark includes: reference marks formed in rectangular shapes comprising sides in which fine patterns are formed; and comparison marks formed as rectangular shapes which are smaller than the rectangular shapes of the reference marks and formed of fine patterns, wherein the number of comparison marks is equal to the number of reference marks, wherein the reference marks and the comparison marks are formed on different thin films formed on a semiconductor substrate to be used to inspect alignment states of the different thin films, and the overlay mark reflects an effect of aberration of patterns of memory cells through the fine patterns during a calculation of MR (mis-registration).

Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Abstract: A semiconductor memory device includes a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

Abstract: In a method of manufacturing a capacitor and a method of manufacturing a dynamic random access memory device, an insulating layer covering an upper portion of a conductive layer may be provided with an ozone gas so as to change the property of the upper portion of the insulating layer. The upper portion of the insulating layer may be chemically removed to expose the upper portion of the conductive layer. The exposed upper portion of the conductive layer may be removed so as to transform the conductive layer into a lower electrode. The remaining portion of the insulating layer may be removed, and an upper electrode may be formed on the lower electrode.

Abstract: A method of correcting a design pattern of a mask takes into account the overlay margin between adjacent one of actual patterns that are stacked on a substrate. First, a pattern of a photomask for forming a first one of the actual patterns on a substrate is conceived. Also, information representing the image of a second one of the actual patterns is produced. Then, optical proximity correction (OPC) is performed on the first pattern based on the information. The information may be obtained by simulating the transcription of a photomask having a second pattern designed to form the second actual pattern, or by forming the second actual pattern and then capturing the image of the second actual pattern. Accordingly, a sufficient margin is provided between the second actual pattern and the first pattern on which the optical proximity correction has been performed.

Abstract: DRAM devices include a plurality of word lines extending in a first direction and a plurality of bit lines extending in a second direction and intersecting the word lines. A plurality of active regions is provided that are electrically coupled to the word lines and the bit lines. Each of the active regions defines a single unit memory cell having an area of 6F2 in terms of a minimum line width F. Each of the active regions may be overlapped by only one word line and the active regions may be defined by an isolation region.

Abstract: A semiconductor memory device includes a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

Abstract: Methods for manufacturing semiconductor devices with contact bodies extended in a direction of a bit line to increase the contact area between a contact body and a storage electrode is provided. In one aspect a method includes forming gate lines on a semiconductor substrate, forming a first insulating layer to cover the gate lines, forming first contact pads and second contact pads, which are electrically connected to the semiconductor substrate between the gate lines, by penetrating the first insulating layer. Further, a second insulating layer is formed to cover the first contact pads and the second contact pads, and bit lines are formed across over the gate lines and are electrically connected to the second contact pads by penetrating the second insulating layer. In addition, a third insulating layer is formed to cover the bit lines and is selectively etched to form a band-type opening that crosses the bit lines and exposes the first contact pads.

Abstract: A semiconductor memory device comprises a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

Abstract: In an optical member holder and a projection exposure apparatus having the same, a light beam radiated from a light source may be formed into light having a desired shape by selecting one of a plurality of optical elements. An optical element holder may include a support member to support the plurality of optical elements, a first driving section to move or rotate the support member to select one of the optical elements, and a second driving section to rotate the selected optical element to adjust an arrangement direction thereof. The light formed by the selected optical element may be directed through a reticle.

Abstract: In a semiconductor device having asymmetric bit lines and a method of manufacturing the same, a plurality of active regions are electrically isolated from one another by an isolation layer. Each active region extends in a first direction and has a central portion between end portions. The device includes a plurality of transistors, each including first impurity doped regions formed at the central portions and second impurity doped regions formed at both end portions to extend in a second direction different from the first direction. A plurality of asymmetric bit lines are electrically connected to the first impurity doped regions, each extending in a third direction substantially perpendicular to the second direction. Each asymmetric bit line has a first side surface extending in a straight line along the third direction, and a second side surface including a plurality of protrusions.