Abstract: A method of a first user equipment (UE) may comprise: receiving a downlink (DL) reference signal transmitted by a base station using a beam included in a beam candidate group to be used for sidelink (SL) communication with a second UE; measuring a DL reference signal received power (RSRP) of the DL reference signal; determining a transmit power of a beam included in the beam candidate group based on the measured DL RSRP; and transmitting SL data to the second UE with the determined transmit power.

Abstract: An operation method of a relay node may include: receiving, from a first communication node, first data composed of n bits; receiving, from a second communication node, second data composed of m bits; in response to determining that n is greater than m, generating first T-data of m bits excluding (n-m) bits from the n-bits of the first data and first R-data of (n-m) bits; generating third data by performing a network coding operation on the first T-data and the second data; transmitting the third data to the first communication node; and transmitting the third data and the first R-data to the second communication node.

Abstract: A molding apparatus for fabricating a semiconductor package includes an upper mold including an upper cavity, a first side cavity at a first side of the upper cavity, a second side cavity formed at an opposite second side of the upper cavity, and a first driving part connected to the first side cavity and configured to move the first side cavity in a first direction, and a bottom mold including a bottom cavity configured to receive a molding target including a package substrate and at least one semiconductor chip. A width in the first direction between the first side cavity and the second side cavity may be smaller than a width of the package substrate in the first direction and greater than a width in the first direction between a first boundary and a second boundary of the at least one semiconductor chip.

Abstract: An organic light emitting diode (OLED) includes an emissive layer with at least one emitting part includes at least one emitting material layer, a first electron transport layer and a second electron transport layer disposed sequentially between two facing electrodes, wherein the first electron transport layer includes a first electron transporting material of a benzimidazole-based compound substituted with at least one spiro-structured fluorenyl group and the second electron transport layer includes a second electron transporting material of a benzimidazole-based compound substituted with at least one anthracenyl group. The first electron transport including the first electron transport material with excellent thermal stability is disposed adjacently to the emitting material layer so that the OLED can maintain good luminescent intensity in an environment of high temperature and implement beneficial luminous properties.

Abstract: The present disclosure relates to a positive active material for a lithium rechargeable battery, a manufacturing method thereof, and a lithium rechargeable battery including the positive active material, and it provides a positive active material which is a lithium composite metal oxide including nickel, cobalt, and manganese, and either has orientation in a direction of with respect to an ND axis that is equal to or greater than 29% or has orientation in a direction of [120]+[210] with respect to an RD axis that is equal to or greater than 82% in the case of an EBSD analysis with a misorientation angle (?g) that is equal to or less than 30 degrees.

Abstract: A semiconductor device may include a gate structure including a first conductive layer, a second conductive layer, and a third conductive layer, the third conductive layer being disposed between the first conductive layer and the second conductive layer and thicker than the first conductive layer and the second conductive layer, channel structures passing through the gate structure, and an isolation structure including a first portion passing through the second conductive layer and extended into the channel structures and a second portion protruding from the first portion into the third conductive layer and disposed between the channel structures.

Abstract: Provided herein is a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a gate stacked body including interlayer insulating layers and conductive patterns that are alternately stacked in a vertical direction on a substrate, a channel structure penetrating at least a portion of the gate stacked body, and an upper surface of the channel structure left exposed by the gate stacked body.

Abstract: A memory device includes a memory block to which a plurality of lines are connected. The memory device also includes a plurality of memory cells respectively connected to word lines among the plurality of lines, wherein the plurality of memory cells are formed as a plurality of plug holes formed in a stack structure between a drain select line among the plurality of lines and a slit. The memory device further includes a plurality of page buffers connected to the plurality of memory cells through a plurality of bit lines among the plurality of lines. The memory device additionally includes a peripheral circuit for performing a read operation on the plurality of memory cells. The peripheral circuit includes a voltage generator configured to control a signal applied to the plurality of page buffers so that the read operation is performed according to positions of the plug holes.

Abstract: A semiconductor device includes a plurality of first memory strings each first memory string having a channel with a first length and a plurality of second memory strings each second memory string having a channel with a second length shorter than the first length. A method of operating the semiconductor device includes: performing a first read operation on the first read unit, wherein the first read unit includes the first memory cells sharing the same first word line among first memory cells included in the plurality of the first memory strings; and performing a second read operation on the second read unit, wherein the second read unit includes the second memory cells sharing the same second word line among second memory cells included in the plurality of the second memory strings.