Patents by Inventor Jung-Jui KANG

Jung-Jui KANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12156336
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: November 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chiung-Ying Kuo, Hung-Chun Kuo, Pao-Nan Lee, Jung Jui Kang, Chang Chi Lee
  • Publication number: 20240345315
    Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic structure, an alignment component and a light transmission element. The photonic structure includes an optical I/O. The alignment component includes a through hole extending through the alignment component and aligned with the optical I/O of the photonic structure. The light transmission element entirely fills the through hole of the alignment component.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 17, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
  • Publication number: 20240345341
    Abstract: A package device is provided. The package device includes a first die and a first through via structure. The first die has a first optical I/O. The first through via structure is over the first die. A first region of the first through via structure is configured to dissipate heat from the first die and a second region of the first through via structure is configured to transmit an optical signal to or from the first optical I/O.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 17, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Shih-Yuan SUN, Chiu-Wen LEE, Chang Chi LEE, Chun-Yen TING, Hung-Chun KUO
  • Publication number: 20240329300
    Abstract: A package device and an electronic device are provided. The package device includes a carrier and a die. The die is disposed over the carrier and has a first surface facing the carrier and a second surface opposite to the first surface. The first surface of the die is configured to electrically connect to the carrier and the second surface of the die is configured to optically connect to the carrier.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
  • Publication number: 20240329344
    Abstract: Semiconductor packages and methods for manufacturing the semiconductor packages are provided. The semiconductor package includes a first electronic element disposed over a first substrate; a second electronic element disposed over a second substrate spaced apart from the first substrate; and a first interconnection element connected to the first electronic element and the second electronic element. The first electronic element extends beyond an edge of the first substrate. The second electronic element extends beyond an edge of the second substrate and towards the first electronic element. The first interconnection element is configured to optically transmit a signal between the first electronic element and the second electronic element.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN, Chang Chi LEE, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20240332192
    Abstract: A package structure is provided. The package structure includes a bridge component, a photonic processing unit, and an electrical device. The photonic processing unit is disposed over the bridge component. The electrical device is disposed over the bridge component. The bridge component is configured to optically couple with the photonic processing unit and electrically connect with the electronic component.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
  • Patent number: 12107074
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: October 1, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Chi Lee, Jung Jui Kang, Chiu-Wen Lee, Li Chieh Chen
  • Publication number: 20240264368
    Abstract: An optoelectronic device is provided. The optoelectronic device includes a plurality of first waveguides and a plurality of second waveguides. The plurality of first waveguides are configured to receive a first plurality of optical signals. The plurality of second waveguides are configured to transmit a second plurality of optical signals. The plurality of first waveguides extend substantially along a first direction and the plurality of second waveguides extend substantially along a second direction different from and non-parallel with the first direction.
    Type: Application
    Filed: February 3, 2023
    Publication date: August 8, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN, Chang Chi LEE, Chun-Yen TING
  • Publication number: 20240213205
    Abstract: A package is provided. The package includes a carrier, a component, and a first protective element. The component is disposed over the carrier and having a side surface configured for optically coupling. The first protective element is disposed between the carrier and the component. The side surface of the component is free from being in contact with the first protective element.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Shih-Yuan SUN, Chieh-Chen FU
  • Patent number: 11991827
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: May 21, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun-Yen Ting, Pao-Nan Lee, Hung-Chun Kuo, Jung Jui Kang, Chang Chi Lee
  • Patent number: 11967559
    Abstract: An electronic package is provided. The electronic package includes a semiconductor substrate. The semiconductor substrate includes a first active region and a first passive region separated from the first active region. The first active region is configured to regulate a power signal. The first passive region is configured to transmit a data signal.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: April 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Chi Lee, Chiu-Wen Lee, Jung Jui Kang
  • Publication number: 20240128193
    Abstract: An electronic module is disclosed. The electronic module includes an electronic component and an interconnection structure disposed over the electronic component. The interconnection structure comprises a first region and a second region different from the first region. The first region is configured to transmit a power from outside of the electronic module to the electronic component. The second region is configured to dissipate heat from the electronic component.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Chang Chi LEE, Jung Jui KANG
  • Publication number: 20240130043
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240055365
    Abstract: An electronic device is disclosed. The electronic device includes a first interconnection structure, and a first electronic component disposed over the first interconnection structure and having an active surface and a lateral surface. The electronic device also includes a power connection disposed between the first interconnection structure and the active surface of the first electronic component, and a first non-power connection extending along the lateral surface of the first electronic component and electrically connected to the first interconnection structure. The electronic device also includes a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Jung Jui KANG, Chang Chi LEE, Pao-Nan LEE, Ming-Fong JHONG
  • Publication number: 20240038679
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component, a first conductive element, and a voltage regulator. The voltage regulator is disposed adjacent to the first electronic component. The voltage regulator is configured to regulate a first voltage from the first EMI shielding layer and to provide the first electronic component with a second voltage.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240038712
    Abstract: A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a first component, a second component, and a protective element. The first component and the second component are arranged side by side in a first direction over the carrier. The protective element is disposed over a top surface of the carrier and extending from space under the first component toward a space under the second component. The protective element includes a first portion and a second portion protruded oppositely from edges of the first component by different distances, and the first portion and the second portion are arranged in a second direction angled with the first direction.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Shih-Yuan SUN, Chieh-Chen FU
  • Publication number: 20240030135
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first region and a second region distinct from the first region. The electronic device also includes an electronic component covering the first region and at least partially exposing the second region. The electronic device also includes a first power regulating element in the second region of the carrier and a second power regulating element. The second power regulating element is disposed adjacent to the first power regulating element and electrically connected to the electronic component through the first power regulating element to provide a first power path.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240030125
    Abstract: An electronic device is disclosed. The electronic device includes a first circuit structure, a first die, a second die, and a third die. The first die is disposed below the first circuit structure. The second die is disposed below the first circuit structure. The third die is disposed above the first circuit structure and electrically connects the first die to the second die. The first die communicates with the second die through the third die.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240023239
    Abstract: An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240008184
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE