Patents by Inventor Jung-kun Lim

Jung-kun Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879248
    Abstract: A semiconductor device includes a substrate, a conductive pattern on the substrate, a lower electrode electrically connected to the conductive pattern, a dielectric layer covering a surface of the lower electrode, a first upper electrode on the dielectric layer, a diffusion barrier on an upper surface of the first upper electrode, and a second upper electrode covering the diffusion barrier, the second upper electrode including a different material from that of the first upper electrode.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hoon-Sang Choi, Hyeok-Jin Jeong, Jung-Kun Lim, Young-Mo Tak, Sung-Kil Han
  • Publication number: 20190189615
    Abstract: A semiconductor device includes a substrate, a conductive pattern on the substrate, a lower electrode electrically connected to the conductive pattern, a dielectric layer covering a surface of the lower electrode, a first upper electrode on the dielectric layer, a diffusion barrier on an upper surface of the first upper electrode, and a second upper electrode covering the diffusion barrier, the second upper electrode including a different material from that of the first upper electrode.
    Type: Application
    Filed: February 21, 2019
    Publication date: June 20, 2019
    Inventors: Hoon-Sang CHOI, Hyeok-Jin JEONG, Jung-Kun LIM, Young-Mo TAK, Sung-Kil HAN
  • Publication number: 20170186752
    Abstract: A semiconductor device includes a substrate, a conductive pattern on the substrate, a lower electrode electrically connected to the conductive pattern, a dielectric layer covering a surface of the lower electrode, a first upper electrode on the dielectric layer, a diffusion barrier on an upper surface of the first upper electrode, and a second upper electrode covering the diffusion barrier, the second upper electrode including a different material from that of the first upper electrode.
    Type: Application
    Filed: December 23, 2016
    Publication date: June 29, 2017
    Inventors: Hoon-Sang CHOI, Hyeok-Jin JEONG, Jung-Kun LIM, Young-Mo TAK, Sung-Kil HAN
  • Patent number: 6214689
    Abstract: An apparatus for manufacturing a semiconductor device and a method of manufacturing a capacitor of a semiconductor device prevents the decrease of the surface area of a hemispherical grained (HSG) film formed on a lower electrode of the capacitor of the semiconductor device due to the abrasion of the HSG film during a subsequent cleaning process. The method of manufacturing a capacitor includes: forming a lower electrode of a capacitor of a semiconductor device over a specific structure formed on a semiconductor substrate; forming a hemispherical grained (HSG) film on an exposed surface of the lower electrode; stabilizing the HSG film in order to prevent the decrease of the surface area of the HSG film due to the abrasion of the HSG film during subsequent cleaning. The apparatus for manufacturing a semiconductor device includes a first process chamber for formation of the HSG film on a lower electrode of a capacitor of the semiconductor device and a second process chamber which stabilizes the HSG film.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: April 10, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-kun Lim, Jun-sig Park