Patents by Inventor Jung-Lieh Hsu

Jung-Lieh Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7098978
    Abstract: A wide-viewing angle LCD comprises a first substrate and a second substrate disposed opposite each other with a liquid crystal layer disposed therebetween. A first electrode is disposed on the interior of the first substrate. A first protrusion or slit structure with a first pattern is formed on the first electrode. A second electrode is disposed on the interior of the second substrate. A second protrusion or slit structure with a second pattern is formed on the second electrode. The first and second patterns constitute a third pattern with at least one intersection.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: August 29, 2006
    Assignee: Quanta Display Inc.
    Inventors: Chien-Hua Chen, Yu-Fu Lin, Jung-Lieh Hsu, Ruei-Liang Luo
  • Publication number: 20050219452
    Abstract: A wide-viewing angle LCD comprises a first substrate and a second substrate disposed opposite each other with a liquid crystal layer disposed therebetween. A first electrode is disposed on the interior of the first substrate. A first protrusion or slit structure with a first pattern is formed on the first electrode. A second electrode is disposed on the interior of the second substrate. A second protrusion or slit structure with a second pattern is formed on the second electrode. The first and second patterns constitute a third pattern with at least one intersection.
    Type: Application
    Filed: August 9, 2004
    Publication date: October 6, 2005
    Inventors: Chien-Hua Chen, Yu-Fu Lin, Jung-Lieh Hsu, Ruei-Liang Luo
  • Patent number: 6951803
    Abstract: A method for reducing peeling of a cross-linked polymer passivation layer in a solder bump formation process including providing a multi-level semiconductor device formed on a semiconductor process wafer having an uppermost surface comprising a metal bonding pad in electrical communication with underlying device levels; forming a layer of resinous pre-cursor polymeric material over the process surface said resinous polymeric material having a glass transition temperature (Tg) upon curing; subjecting the semiconductor process wafer to a pre-curing thermal treatment temperature below Tg for a period of time; and, subjecting the semiconductor process wafer to at least one subsequent thermal treatment temperature above Tg for a period of time to form an uppermost passivation layer.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: October 4, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai Tzeng, Cheng-Ming Wu, Chu-Wei Hu, Jung-Lieh Hsu, Kuei-Yuam Hsu
  • Publication number: 20050200782
    Abstract: A multi-domain vertical alignment (MVA) liquid crystal display (LCD) comprising a first substrate, a second substrate and a liquid crystal layer disposed between the first substrate and the second substrate is provided. A plurality of first protrusions including a plurality of radiation-shaped protrusions arranged in stripe is formed over the first substrate. In addition, a plurality of second protrusions including stripe protrusions is formed over the second substrate. The first protrusions and the second protrusions are interlaced correspondingly. Since the radiation-shaped protrusions arranged in stripe are disposed over the first substrate, the liquid crystal molecules of the LCD may have more tilt directions. Thus, the range of the viewing angle of the LCD is increased.
    Type: Application
    Filed: January 27, 2005
    Publication date: September 15, 2005
    Inventors: Chien-Hua Chen, Yu-Fu Lin, Jung-Lieh Hsu
  • Publication number: 20050191836
    Abstract: A method for reducing peeling of a cross-linked polymer passivation layer in a solder bump formation process including providing a multi-level semiconductor device formed on a semiconductor process wafer having an uppermost surface comprising a metal bonding pad in electrical communication with underlying device levels; forming a layer of resinous pre-cursor polymeric material over the process surface said resinous polymeric material having a glass transition temperature (Tg) upon curing; subjecting the semiconductor process wafer to a pre-curing thermal treatment temperature below Tg for a period of time; and, subjecting the semiconductor process wafer to at least one subsequent thermal treatment temperature above Tg for a period of time to form an uppermost passivation layer.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 1, 2005
    Inventors: Kai Tzeng, Cheng-Ming Wu, Chu-Wei Hu, Jung-Lieh Hsu, Kuei-Yuam Hsu