Abstract: A voltage controlled oscillator (VCO) includes a voltage controlled current source (VCCS), a negative resistance circuit (NRC), a first transformer, a second transformer, a first transistor and a second transistor. A current terminal of the VCCS receives a control voltage. First terminals of first and second current paths in the NRC are coupled to a current terminal of the VCCS. Primary sides of the first and the second transformers are respectively coupled to second terminals of the first and the second current paths. Secondary sides of the first and the second transformers are first and second output terminals of the VCO, respectively. First terminals of the first and the second transistor are respectively coupled to the secondary sides of the first and the second transformers. Control terminals of the first and the second transformers are respectively coupled to the primary sides of the first and the second transformers.

Abstract: A base station includes an interface for providing communication with at least one other base station and communication with a network server in a communication system, a processor coupled to the interface, and a memory coupled to the processor. The memory stores program instructions executable by the processor to connect to the network server using the interface, send information to the network server regarding femtocell capability, configure operating parameters of the base station based on the information, including to configure transmission power of the base station, and operate the base station based on the operating parameters.

Abstract: Disclosed embodiments include a method of paging one of a plurality of mobile subscribers in a wireless communication network. The method includes receiving, at a base station, an idle mode request from the one mobile subscriber and sending an idle mode notification to a control device, after receiving the idle mode request from the one mobile subscriber. The method also includes receiving a paging request from the control device and sending a paging advertisement intended for the one mobile subscriber, after receiving the paging request from the control device.

Abstract: A bust-mode clock and data recovery circuit using phase selecting technology is provided. In the data recovery circuit, a phase-locked loop (PLL) circuit is used for providing a plurality of fixed clock signals, each of which has a clock phase. An oversampling phase selecting circuit is coupled to the phase-locked loop circuit and used for detecting a data edge of a received data signal by using the clock signals and selects a clock phase to be locked according to the location of the data edge. A delay-locked loop (DLL) circuit is coupled to the phase-locked loop circuit and the oversampling phase selecting circuit, and used for comparing the data phase of the data signal with the clock phase of the selected clock signal, so as to delay the data phase of the data signal by a delay time until the data phase is locked as the clock phase.