Patents by Inventor Jung-Min Choi

Jung-Min Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250113597
    Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
    Type: Application
    Filed: December 12, 2024
    Publication date: April 3, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung Soo KIM, Gi Gwan PARK, Jung Hun CHOI, Koung Min RYU, Sun Jung LEE
  • Patent number: 12266479
    Abstract: A multilayer electronic component has a body and a non-conductive resin layer. The non-conductive resin layer includes a body cover portion disposed in a region of an external surface of the body in which an electrode layer of an external electrode is not disposed, and an extending portion extending from the body cover portion between the electrode layer and a conductive resin layer of the external electrode, to thereby suppress arc discharge, improve bending strength, and improve moisture resistance.
    Type: Grant
    Filed: February 13, 2024
    Date of Patent: April 1, 2025
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Seok Yi, Jung Min Kim, Bon Seok Koo, Chang Hak Choi, Il Ro Lee, Byung Woo Kang, San Kyeong, Hae Sol Kang
  • Publication number: 20250107078
    Abstract: A semiconductor device may include a gate structure including stacked local lines and a multi-step structure, wherein the multi-step structure defines pads of the local lines, channel patterns respectively disposed over the pads, a block word line disposed over the channel patterns and extending along a profile of the multi-step structure, and first contact plugs passing through the channel patterns and respectively connecting the channel patterns and the local lines.
    Type: Application
    Filed: December 21, 2023
    Publication date: March 27, 2025
    Inventors: Seok Min CHOI, Jeong Hwan KIM, Jung Shik JANG, Rho Gyu KWAK, In Su PARK, Na Yeong YANG, Won Geun CHOI, Jung Dal CHOI
  • Patent number: 12260803
    Abstract: The embodiment relates to a data driving device for driving pixels of a display panel. In the data driving device, two adjacent DACs can have different gate loads for the same gray level value so that the fluctuation of the gate load according to the gray level value is reduced.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: March 25, 2025
    Assignee: LX SEMICON CO., LTD.
    Inventors: Da Sol Won, Kwang Myung Kang, Yong Min Kim, Dong Keun Song, Jung Min Choi, Seon Ho Hong
  • Patent number: 12262034
    Abstract: The present invention relates to a method and an apparatus for interlayer prediction, and the method for interlayer prediction, according to the present invention, comprises the steps of: deciding whether to apply an interlayer prediction to an enhancement layer; and performing a prediction on a current block of the enhancement layer based on reference information that is generalized and generated from a reference picture, which is decoded, of a reference layer, when the interlayer prediction is applied, wherein the reference layer information can be encoding information of a reference block, which corresponds to a current block of the enhancement layer, from the reference layer, and residual information.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: March 25, 2025
    Assignees: Electronics and Telecommunications Research Institute, KWANGWOON UNIVERSITY INDUSTRY-ACADEMIC COLLABORATION FOUNDATION
    Inventors: Ha Hyun Lee, Jung Won Kang, Jin Soo Choi, Jin Woong Kim, Dong Gyu Sim, Hyo Min Choi, Jung Hak Nam
  • Publication number: 20250098501
    Abstract: A display device includes a light emitting element layer, a light control layer on the light emitting element layer and including spaced apart light blocking films and a light transmitting film between the light blocking films, and a first emission area and a second emission area, the light blocking films include, a first louver and a second louver on both sides of a first side of the first emission area, respectively, with the first side between, and a third louver and a fourth louver on both sides of a second side of the second emission area, respectively, with the second side between, a width of the first emission area is different from a width of the second emission area, and a distance between the first side and the first louver is different from a distance between the second side and the third louver.
    Type: Application
    Filed: April 17, 2024
    Publication date: March 20, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: Yong Sub SHIM, Je Won YOO, Jung Min CHOI, Jong Beom HONG
  • Publication number: 20250096152
    Abstract: A semiconductor device may include a source structure, a support structure positioned on the source structure and including a first inclined surface extending in a second direction crossing the first direction, a gate structure positioned on the source structure and the support structure and including conductive layers and insulating layers alternately stacked, channel structures extending through the gate structure and connected to the source structure, and a slit structure extending in the first direction through the gate structure, wherein each of the conductive layers includes a second inclined surface extending in the second direction.
    Type: Application
    Filed: December 21, 2023
    Publication date: March 20, 2025
    Inventors: Rho Gyu KWAK, In Su PARK, Jung Shik JANG, Seok Min CHOI, Won Geun CHOI
  • Publication number: 20250098045
    Abstract: Disclosed is a method for controlling a plurality of light-emitting devices. The method includes at least: inputting group information into a respective light-emitting device, the group information to be inputted corresponds to a seat in a venue, on which the respective light emitting device to be positioned; and selectively controlling illuminating or extinguishing of groups of light-emitting devices, in accordance with the group information, to present an image over the plurality of light-emitting devices positioned on seats in the venue of an event during a particular period of a group-performance presentation.
    Type: Application
    Filed: November 5, 2024
    Publication date: March 20, 2025
    Applicant: FANLIGHT CO., LTD.
    Inventors: Kyung Il CHOI, Jung Min CHOI
  • Patent number: 12248677
    Abstract: A data processing system includes data processing devices each including a computing memory and configured to perform a task; one or more host devices connected to the data processing devices, and each configured to: select one or more of the data processing devices based on meta information including a size of a memory, and sizes of the computing memories of the respective data processing devices, and request the selected processing devices to perform a first task; a network switch configured to connect the one or more host devices to the data processing devices; and a network manager in the network switch and configured to: collect free memories of the respective data processing devices based on the meta information and the sizes of the computing memories of the respective data processing devices, and control the one or more host devices to use some of the free memories.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 11, 2025
    Assignee: SK hynix Inc.
    Inventors: Jung Min Choi, Sun Woong Kim
  • Publication number: 20250081454
    Abstract: A semiconductor device may include: a first gate structure; a second gate structure disposed over the first gate structure; and a channel structure including a first portion extending through the first gate structure, the first portion having a tapered cross section, a second portion having a tapered cross section, and a third portion connecting the first portion with the second portion, wherein the third portion has a vertical profile, and wherein the second portion and the third portion extends through the second gate structure.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 6, 2025
    Inventors: Na Yeong YANG, Ki Jun YUN, Jung Shik JANG, In Su PARK, Seok Min CHOI
  • Publication number: 20250067623
    Abstract: Disclosed is a device for processing a substrate, the device including: a support unit including a spin chuck supporting a substrate, a rotation shaft supporting the spin chuck, and a driver providing rotational force to the rotation shaft; and a determination unit for determining whether the rotation shaft is defective, in which the determination unit determines whether the rotation shaft is defective based on a current value applied to the driver while the rotation shaft is rotating.
    Type: Application
    Filed: August 1, 2024
    Publication date: February 27, 2025
    Applicant: SEMES CO., LTD.
    Inventors: Jong Hak CHOI, Wan Hee HAN, Han Seon KANG, Jung Min YOON, Dae Il JANG
  • Publication number: 20250072011
    Abstract: A memory device includes a first peripheral circuit having first page buffers is functionally divided into a cell region and a connection region. A first memory cell array positioned on the first peripheral circuit includes first bit lines that are electrically connected to the first page buffers. A second memory cell array positioned on the first memory cell array includes second bit lines, which are electrically connected to the first bit lines, respectively. The first peripheral circuit is able to make use of both memory arrays using connections between the two memory arrays.
    Type: Application
    Filed: February 22, 2024
    Publication date: February 27, 2025
    Applicant: SK hynix Inc.
    Inventors: Jung Shik JANG, Seok Min CHOI, Rho Gyu KWAK, Won Geun CHOI, In Su PARK
  • Publication number: 20250071989
    Abstract: The present technology relates to a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a first stack structure, a plurality of first slits passing through the first stack structure in a vertical direction and extending in a first horizontal direction orthogonal to the vertical direction, a first source line layer contacting an a top portion of the first stack structure, a second source line layer directly contacting the first source line layer, a second stack structure contacting the second source line layer and overlapping with the first stack structure in the vertical direction, and a plurality of second slits passing through the second stack structure in the vertical direction and extending in a second horizontal direction orthogonal to the vertical direction.
    Type: Application
    Filed: December 11, 2023
    Publication date: February 27, 2025
    Inventors: Seok Min CHOI, Jung Shik JANG, Rho Gyu KWAK, In Su PARK, Won Geun CHOI, Jung Dal CHOI
  • Publication number: 20250072263
    Abstract: A display device includes: a support substrate including a main area including a display area in which light emitting areas are arranged, a hole area surrounded by the main area, and a hole peripheral area between the hole area and the main area; a circuit layer on the support substrate; an element layer on the circuit layer; a capping layer on the element layer; an encapsulation substrate on the capping layer and bonded to the support substrate; a first hole peripheral dam in the hole peripheral area and surrounding a periphery of the hole area; a second hole peripheral dam in the hole peripheral area and surrounding a periphery of the first hole peripheral dam; and an auxiliary dam in a valley area of the hole peripheral area between the first hole peripheral dam and the second hole peripheral dam.
    Type: Application
    Filed: March 27, 2024
    Publication date: February 27, 2025
    Inventors: Cheon Deok PARK, Dong Min KIM, Jung Tae KIM, Jun Ho CHOI
  • Patent number: 12239016
    Abstract: Provided is an organic light emitting device comprising an anode; a cathode; and a light emitting layer provided between the anode and the cathode, wherein the light emitting layer comprises a first host material comprising a compound of Chemical Formula A: a second host material including a compound of Chemical Formula B: and a dopant material comprising a compound of Chemical Formula C or D:
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: February 25, 2025
    Assignee: LG CHEM, LTD.
    Inventors: Woochul Lee, Ki Dong Koo, Ji Young Choi, Young Seok Kim, Joo Ho Kim, Kongkyeom Kim, Dongheon Kim, Younghee Lee, Ki Kon Lee, Sujeong Geum, Jung Min Yoon
  • Patent number: 12220636
    Abstract: Provided is a method and an apparatus for targeting an object in a game. The method of targeting an object in a game includes: setting a center point of a first targeting area based on a first input from a user; displaying the first targeting area surrounded by a closed curve around the center point on a screen of a user terminal; displaying a list including at least one object located in the first targeting area on the screen; and moving the first targeting area based on a second input by the user received after the first input.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: February 11, 2025
    Assignee: NCSOFT Corporation
    Inventors: Hyun Ku Kang, Kyung Hwan Kim, Jong Soo Kim, Sung Heun Bae, Won Jong Son, Hwan Eui Yang, Yong Ki Lee, Su Jae Lim, Sung Won Jang, Woo Young Cho, Won Min Choi, Jung Rok Choi
  • Publication number: 20250041429
    Abstract: The present disclosure provides: a compound of a specific chemical structure, having excellent activity with respect to BTK degradation; or a pharmaceutically acceptable salt thereof. The present disclosure also provides a composition comprising the compound or pharmaceutically acceptable salts thereof. The present disclosure also provides are pharmaceutical use for treating or preventing BTK-associated diseases (for example, autoimmune diseases or cancer) of the compound, the salt thereof, and the composition comprising same according to the present disclosure. The present disclosure also provides a method for treating or preventing BTK-associated diseases (for example, autoimmune diseases or cancer), comprising administering, to a subject requiring treatment, an effective amount of the compound, the salt thereof, or the composition comprising same according to the present disclosure.
    Type: Application
    Filed: November 4, 2022
    Publication date: February 6, 2025
    Inventors: Song Hee LEE, Je Ho RYU, Jung Min AHN, Hee Jung MOON, Ho Hyun LEE, Mi Young JANG, Whee Sahng YUN, Ye Eun KIM, Sun Mi YOO, Ye Seul LIM, Na Rea JEONG, So Hyuk KIM, Ae Ran CHOI, Han Wool KIM
  • Publication number: 20250048626
    Abstract: A memory device may include a stack structure including a plurality of conductive layers and a plurality of interlayer insulating layers, which are alternately stacked along a first direction, an opening extending in the first direction from at least one conductive layer, among the plurality of conductive layers, in the stack structure, and a contact plug in the opening. The opening may include a protrusion portion protruding in a second direction intersecting the first direction.
    Type: Application
    Filed: January 15, 2024
    Publication date: February 6, 2025
    Applicant: SK hynix Inc.
    Inventors: Won Geun CHOI, Jung Shik JANG, Rho Gyu KWAK, Seok Min CHOI
  • Patent number: 12218300
    Abstract: The present disclosure relates to an LED display device, and more particularly, to an LED display device including a repair structure for a deteriorated pixel. In the present disclosure, a subLED electrically connected to first and second connecting electrodes for applying a voltage to a LED is disposed on a deteriorated LED. Thus, deterioration of a display quality due to a deteriorated pixel is prevented. Since it is not required to remove a deteriorated LED, a fabrication cost is reduced and a process efficiency is improved.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: February 4, 2025
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kyu Oh Kwon, Jae Min Sim, Seung Jun Lee, Jung Hun Choi
  • Patent number: 12211846
    Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
    Type: Grant
    Filed: January 18, 2024
    Date of Patent: January 28, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Soo Kim, Gi Gwan Park, Jung Hun Choi, Koung Min Ryu, Sun Jung Lee