Abstract: There is provided in the present disclosure a shift register unit, comprising: an input circuit, whose first terminal is connected to a power supply terminal, second terminal is connected to an input terminal, and third terminal is connected to a pull-up node, the input circuit being configured to input a power supply signal input by the power supply terminal to the pull-up node under the control of an input signal; a pull-up control circuit, whose first terminal is connected to a first clock signal terminal, and second terminal is connected to the pull-up node, the pull-up control circuit being configured to control a potential of the pull-up node according to a first clock signal input by the first clock signal terminal; a pull-up circuit, whose first terminal is connected to a first signal terminal, second terminal is connected to an output terminal, third terminal is connected to the pull-up node.

Abstract: There is provided in the present disclosure a shift register unit, comprising: an input circuit, whose first terminal is connected to a power supply terminal, second terminal is connected to an input terminal, and third terminal is connected to a pull-up node, the input circuit being configured to input a power supply signal input by the power supply terminal to the pull-up node under the control of an input signal; a pull-up control circuit, whose first terminal is connected to a first clock signal terminal, and second terminal is connected to the pull-up node, the pull-up control circuit being configured to control a potential of the pull-up node according to a first clock signal input by the first clock signal terminal; a pull-up circuit, whose first terminal is connected to a first signal terminal, second terminal is connected to an output terminal, third terminal is connected to the pull-up node.

Abstract: An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises a lining substrate and an electrode pattern formed on the lining substrate, and the electrode pattern includes a plurality of strip-shaped electrodes. There are a plurality of strip-shaped protrusions on an upper surface of the lining substrate, and at least part of strip-shaped electrodes among the plurality of strip-shaped electrodes are formed on the strip-shaped protrusions one-to-one; and there is an included angle between an extending direction of the strip-shaped electrodes and an extending direction of the strip-shaped protrusions, and the included angle is configured so that a rubbing direction of an alignment film is along the extending direction of the strip-shaped protrusions.

Abstract: A GOA signal determining circuit and method thereof, gate driver circuit, and display device are provided. The GOA signal determining circuit is connected to an input end of a GOA unit, at least two clock signal ends of the GOA unit, and a control end of a reset unit of a PU node in the GOA unit. The GOA signal determining circuit detects a signal of the input end of the GOA unit and a signal of the at least two clock signal ends of the GOA unit, and outputs a control signal to the reset unit of the PU node to control the reset unit to output a reset signal to the PU node to turn off an output transistor of the GOA unit, upon determining both of the signal of the input end and the signal of the at least two clock signal ends are abnormal.

Abstract: A GOA signal determining circuit and method thereof, gate driver circuit, and display device are provided. The GOA signal determining circuit is connected to an input end of a GOA unit, at least two clock signal ends of the GOA unit, and a control end of a reset unit of a PU node in the GOA unit. The GOA signal determining circuit detects a signal of the input end of the GOA unit and a signal of the at least two clock signal ends of the GOA unit, and outputs a control signal to the reset unit of the PU node to control the reset unit to output a reset signal to the PU node to turn off an output transistor of the GOA unit, upon determining both of the signal of the input end and the signal of the at least two clock signal ends are abnormal.

Abstract: An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises a lining substrate and an electrode pattern formed on the lining substrate, and the electrode pattern includes a plurality of strip-shaped electrodes. There are a plurality of strip-shaped protrusions on an upper surface of the lining substrate, and at least part of strip-shaped electrodes among the plurality of strip-shaped electrodes are formed on the strip-shaped protrusions one-to-one; and there is an included angle between an extending direction of the strip-shaped electrodes and an extending direction of the strip-shaped protrusions, and the included angle is configured so that a rubbing direction of an alignment film is along the extending direction of the strip-shaped protrusions.

Abstract: There are provided an array substrate and a liquid crystal display apparatus. The array substrate comprises: array structures (12) and pixel electrodes (13) that are formed on a first substrate (11); wherein at least part of pixel regions corresponding to the pixel electrodes (13) are in optical diffusion structures (14); the pixel regions include pixel regions corresponding to pixels of different colors; the optical diffusion structures (14) are so arranged that reflectivity of light reflected from an optical diffusion structure of a pixel region, which corresponds to a pixel of a color having the longest light wavelength, is lower than reflectivity of light reflected from an optical diffusion structure (14) of a pixel region, which corresponds to a pixel of another color.

Abstract: The invention provides an array substrate, a manufacturing method and a display device thereof. The array substrate comprises a substrate, a gate line and a pixel electrode disposed on the substrate, a common electrode disposed above and overlaying the gate line, wherein a strip-shaped through hole is disposed on the common electrode and at least a portion of the strip-shaped through hole is positioned right above the gate line.

Abstract: An embodiment of the present invention relates to a liquid crystal display. An upper surface alignment layer in the liquid crystal display is arranged to comprise, in the direction from a color filter substrate to a liquid crystal layer, a first upper surface alignment layer, a color washout compensation film layer and a second upper surface alignment layer; an alignment direction of the color washout compensation film layer is opposite to the pre-alignment direction of the liquid crystal layer. In the technical solution, the color washout compensation film layer is used to rectify the color washout problem occurring when the screen of a liquid crystal display screen of a fringe field switching mode is viewed from both the left side and right sides.

Abstract: An embodiment of the present invention relates to a liquid crystal display. An upper surface alignment layer in the liquid crystal display is arranged to comprise, in the direction from a color filter substrate to a liquid crystal layer, a first upper surface alignment layer, a color washout compensation film layer and a second upper surface alignment layer; an alignment direction of the color washout compensation film layer is opposite to the pre-alignment direction of the liquid crystal layer. In the technical solution, the color washout compensation film layer is used to rectify the color washout problem occurring when the screen of a liquid crystal display screen of a fringe field switching mode is viewed from both the left side and right sides.

Abstract: The invention provides an array substrate, a manufacturing method and a display device thereof. The array substrate comprises a substrate, a gate line and a pixel electrode disposed on the substrate, a common electrode disposed above and overlaying the gate line, wherein a strip-shaped through hole is disposed on the common electrode and at least a portion of the strip-shaped through hole is positioned right above the gate line.

Abstract: There are provided an array substrate and a liquid crystal display apparatus. The array substrate comprises: array structures (12) and pixel electrodes (13) that are formed on a first substrate (11); wherein at least part of pixel regions corresponding to the pixel electrodes (13) are in optical diffusion structures (14); the pixel regions include pixel regions corresponding to pixels of different colors; the optical diffusion structures (14) are so arranged that reflectivity of light reflected from an optical diffusion structure of a pixel region, which corresponds to a pixel of a color having the longest light wavelength, is lower than reflectivity of light reflected from an optical diffusion structure (14) of a pixel region, which corresponds to a pixel of another color.

Abstract: An embodiment of the present invention relates to a liquid crystal display. An upper surface alignment layer in the liquid crystal display is arranged to comprise, in the direction from a color filter substrate to a liquid crystal layer, a first upper surface alignment layer, a color washout compensation film layer and a second upper surface alignment layer; an alignment direction of the color washout compensation film layer is opposite to the pre-alignment direction of the liquid crystal layer. In the technical solution, the color washout compensation film layer is used to rectify the color washout problem occurring when the screen of a liquid crystal display screen of a fringe field switching mode is viewed from both the left side and right sides.

Abstract: The present invention discloses a photo mask employing in a TFT-LCD fabrication using 4-mask process. The disclosed photo mask comprises a transparent substrate and a shielding pattern formed thereon, wherein the shielding pattern includes a pair of first shielding patterns each having the rectangular shape disposed with separation to cover source and drain formation regions, a pair of second shielding patterns of a bar type disposed between the first shielding patterns and third shielding patterns of a bar type disposed on lower and upper portions of the first and the second shielding patterns to make a clear division between a light transmittance region and a light shielding region on the edge of a channel region.

Abstract: The present invention discloses a method for manufacturing thin film transistor liquid crystal display including the following steps so as to form simultaneously a via hole for contacting a drain electrode and a pixel electrode mutually and the channel of thin film transistor: forming sequentially gate insulation layer, amorphous silicon layer for channel and doped semiconductor layer for ohmic contact, and metal layer for source/drain electrode on the back substrate where the gate electrode and the storage capacitor electrode have been formed; patterning the metal layer for source/drain electrode and the doped semiconductor layer for ohmic contact through a second photolithograph process so that the source electrode, the drain electrode, and the ohmic contacts thereof may be formed; forming a passivation layer on the back substrate where the source electrode and the drain electrode have been formed; patterning the passivation layer, the amorphous silicon layer for channel, and the gate insulation layer thro

Abstract: Disclosed is a method of fabricating a liquid crystal display with a high aperture ratio comprising the steps of: forming a gate bus line including a gate electrode on a transparent insulating substrate and at the same time, forming a storage capacitor electrode in parallel with the gate bus line; depositing a gate insulating layer on the resulting entire surface; forming a semiconductor layer on the gate insulating layer over the gate electrode; forming a data line including source/drain electrodes on the semiconductor layer, thereby completing a thin film transistor; depositing an insulating layer on the resulting lower substrate, wherein the thickness of the insulating layer region formed over the storage capacitor electrode is thinner than that formed over the other part; forming a contact hole by selectively etching the insulating layer in order to expose a predetermined part of the drain electrode; and forming a pixel electrode on the insulating layer to be in contact with the exposed drain electrode.

Abstract: Disclosed is a method for manufacturing a thin film transistor LCD device, in which a counter and a gate bus line are made in a single photolithography process, and a channel of a thin film transistor, a source electrode, a drain electrode, ohmic contacts for the source and drain electrodes are made in a single photolithography process.

Abstract: The present invention discloses a photo mask employing in a TFT—LCD fabrication using 4-mask process. The disclosed photo mask comprises a transparent substrate and a shielding pattern formed thereon, wherein the shielding pattern includes a pair of first shielding patterns of a box type disposed with separation to cover source and drain formation regions, a pair of second shielding patterns of a bar type disposed between the first shielding patterns and third shielding patterns of a bar type disposed on lower and upper portions of the first and the second shielding patterns to make a clear division between a light transmittance region and a light shielding region on the edge of a channel region.

Abstract: Disclosed is a method for manufacturing a thin film transistor LCD device, in which a counter and a gate bus line are made in a single photolithography process, and a channel of a thin film transistor, a source electrode, a drain electrode, ohmic contacts for the source and drain electrodes are made in a single photolithography process.

Abstract: The present invention discloses a method for manufacturing thin film transistor liquid crystal display including the following steps so as to form simultaneously a via hole for contacting a drain electrode and a pixel electrode mutually and the channel of thin film transistor: