Patents by Inventor Jung-Seok Hwang

Jung-Seok Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161978
    Abstract: A multilayer electronic component including: a body including a dielectric layer and internal electrodes; and external electrodes disposed outside the body and connected to the internal electrodes, wherein 1.5?Hfs/Hfc?5.0 when the internal electrode includes hafnium (Hf), Hfc indicates an average Hf content (at %) in a center of the internal electrode, and Hfs indicates an average Hf content (at %) in the internal electrode, measured from the center of the internal electrode to an interface thereof in contact with the dielectric layer.
    Type: Application
    Filed: March 28, 2023
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyun Jun HWANG, Jin Kyung PARK, Sun Il JEONG, Gil Yong LEE, Su Ji KANG, Mun Seong JEONG, Won Seok JANG, Jung Min KIM
  • Publication number: 20240147198
    Abstract: A method for sharing data in a transmitting-side electronic device communicating with a receiving-side electronic device is provided. The method includes connecting a voice call with the receiving-side electronic device; obtaining a sharing object to be shared with the receiving-side electronic device; and transmitting data corresponding to the sharing object to the receiving-side electronic device through a data session formed based on information related to the voice call.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-kih HONG, Min-Seok KIM, Ho-Jun LEE, Su-Jeong LIM, Deok-Ho KIM, Cheol-Ju HWANG, Yeul-Tak SUNG
  • Patent number: 9576612
    Abstract: A nonvolatile memory device includes a first memory block connected to first word lines, a second memory block arranged in a direction perpendicular to the first memory block and is connected to second word lines, first pass transistors for enabling the first word lines, and second pass transistors for enabling the second word lines. The first and second pass transistors are arranged in a horizontal direction with respect to the first and second memory blocks.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ansoo Park, In-Mo Kim, Jung-Seok Hwang
  • Publication number: 20150287437
    Abstract: A nonvolatile memory device includes a first memory block connected to first word lines, a second memory block arranged in a direction perpendicular to the first memory block and is connected to second word lines, first pass transistors for enabling the first word lines, and second pass transistors for enabling the second word lines. The first and second pass transistors are arranged in a horizontal direction with respect to the first and second memory blocks.
    Type: Application
    Filed: December 22, 2014
    Publication date: October 8, 2015
    Inventors: ANSOO PARK, IN-MO KIM, JUNG-SEOK HWANG
  • Patent number: 8018774
    Abstract: A method of operating a nonvolatile memory device includes; performing a verification operation on memory cells while controlling a verification voltage until the memory cells are verification-passed, controlling a level of a bias voltage to be applied to the memory cells according to a level of the verification voltage when the memory cells are verification-passed, and applying the bias voltage to the memory cells.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: September 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Seok Hwang, Sangwon Hwang, Jong-Nam Baek
  • Publication number: 20100103742
    Abstract: A method of operating a nonvolatile memory device includes; performing a verification operation on memory cells while controlling a verification voltage until the memory cells are verification-passed, controlling a level of a bias voltage to be applied to the memory cells according to a level of the verification voltage when the memory cells are verification-passed, and applying the bias voltage to the memory cells.
    Type: Application
    Filed: September 14, 2009
    Publication date: April 29, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Seok HWANG, Sangwon HWANG, Jong-Nam BAEK