Patents by Inventor Jung-Seok Ryu

Jung-Seok Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240055421
    Abstract: A method for manufacturing semiconductor device includes preparing a semiconductor wafer including a first semiconductor substrate and a first through silicon via; removing a trim region of the first semiconductor substrate along an edge portion of the semiconductor wafer to form a remaining edge region; attaching the semiconductor wafer to a carrier substrate, wherein the remaining edge region is in contact with the carrier substrate; forming an edge protection layer along the remaining edge region; exposing the first through silicon via by removing a predetermined depth of the first semiconductor substrate; forming a second final passivation layer to expose the upper surface of the first through silicon via; forming a plurality of first upper connection pads on the second final passivation layer; and dicing the semiconductor wafer into a plurality of first semiconductor chips.
    Type: Application
    Filed: May 18, 2023
    Publication date: February 15, 2024
    Inventors: Jun Yun KWEON, Yeong Beom KO, Woo Ju KIM, Jung Seok RYU, Hwa Young LEE, Hyun Su HWANG
  • Patent number: 7498679
    Abstract: A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: March 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Seok Ryu, Pyoung-Wan Kim
  • Publication number: 20070013039
    Abstract: A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.
    Type: Application
    Filed: February 14, 2006
    Publication date: January 18, 2007
    Inventors: Jung-Seok Ryu, Pyoung-Wan Kim