Patents by Inventor Jung-Sheng Hou

Jung-Sheng Hou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chemical mechanical planarization apparatus
    Patent number: 8057280
    Abstract: A semiconductor process includes polishing a substrate with a slurry in an enclosure. Polishing the substrate is stopped. First mist is injected into the enclosure, such that the first mist has at least about 80% of saturation of a liquid or gaseous solvent in a carrier within the enclosure.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: November 15, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chen Hu, Jung-Sheng Hou, Chun-Chin Huang
  • CHEMICAL MECHANICAL PLANARIZATION METHODS AND APPARATUS
    Publication number: 20100323587
    Abstract: A semiconductor process includes polishing a substrate with a slurry in an enclosure. Polishing the substrate is stopped. First mist is injected into the enclosure, such that the first mist has at least about 80% of saturation of a liquid or gaseous solvent in a carrier within the enclosure.
    Type: Application
    Filed: August 26, 2010
    Publication date: December 23, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tien-Chen HU, Jung-Sheng HOU, Chun-Chin HUANG
  • Chemical mechanical planarization methods
    Patent number: 7824243
    Abstract: A semiconductor process includes polishing a substrate with a slurry in an enclosure. Polishing the substrate is stopped. First mist is injected into the enclosure, such that the first mist has at least about 80% of saturation of a liquid or gaseous solvent in a carrier within the enclosure.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: November 2, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chen Hu, Jung-Sheng Hou, Chun-Chin Huang
  • CHEMICAL MECHANICAL PLANARIZATION METHODS AND APPARATUS
    Publication number: 20080318494
    Abstract: A semiconductor process includes polishing a substrate with a slurry in an enclosure. Polishing the substrate is stopped. First mist is injected into the enclosure, such that the first mist has at least about 80% of saturation of a liquid or gaseous solvent in a carrier within the enclosure.
    Type: Application
    Filed: June 20, 2007
    Publication date: December 25, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tien-Chen Hu, Jung-Sheng Hou, Chun-Chin Huang