Patents by Inventor Jung-soo Nam

Jung-soo Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220098205
    Abstract: Provided is a compound selected from a compound of chemical formula 1 having lysine-specific demethylase-1 (LSD1) inhibitory activity, and a tautomer, a stereoisomer, and a solvate thereof, and pharmaceutically acceptable salts of the aforementioned components. The compound is effective in the prevention or treatment of diseases caused by abnormal activation of LSD1. Also disclosed is a composition containing the compound as an active ingredient and its uses in preventing and/or treating diseases caused by abnormal activation of LSD1.
    Type: Application
    Filed: January 31, 2020
    Publication date: March 31, 2022
    Applicant: HANMI PHARM. CO., LTD.
    Inventors: In Hwan BAE, Won Jeoung KIM, Ji Sook KIM, Ji Young SONG, Jae Yul CHOI, Min Jeong KIM, Jung Soo NAM, Young Gil AHN
  • Patent number: 8907391
    Abstract: A semiconductor device includes a substrate including an active region having an isolated shape and a field region. A gate insulation layer is provided on an upper surface of the active region of the substrate. A gate electrode is provided on the gate insulation layer and spaced apart from the boundary of the active region to cover the middle portion of the active region. An impurity region is provided under a surface of the active region that is exposed by the gate electrode.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 9, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Jung-Soo Nam, Joon-Suk Oh, Hye-Young Park
  • Publication number: 20130161711
    Abstract: A semiconductor device includes a substrate including an active region having an isolated shape and a field region. A gate insulation layer is provided on an upper surface of the active region of the substrate. A gate electrode is provided on the gate insulation layer and spaced apart from the boundary of the active region to cover the middle portion of the active region. An impurity region is provided under a surface of the active region that is exposed by the gate electrode.
    Type: Application
    Filed: September 13, 2012
    Publication date: June 27, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-Soo NAM, Joon-Suk Oh, Hye-Young Park
  • Publication number: 20080284048
    Abstract: Provided are an alignment mark with a higher rate of recognition, a semiconductor chip including the alignment mark, a semiconductor package including the semiconductor chip, and methods of fabricating the alignment mark, the semiconductor chip, and the semiconductor package. The alignment mark may include an align metal pad on a substrate and may be electrically isolated. A protective film may be on the align metal pad and may include an aperture exposing a part of the align metal pad. A metal alignment bump may be on the align metal pad exposed in the aperture such that the metal alignment bump protrudes above the protective film.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 20, 2008
    Inventors: Sung-jae Kim, Yong-bok Park, Jung-soo Nam, In-jung Lee, Sung-jun Kim